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3bb84c9bcc
The C and C++ semantics for compare_exchange require it to return a bool
indicating success. This gets mapped to LLVM IR which follows each cmpxchg with
an icmp of the value loaded against the desired value.
When lowered to ldxr/stxr loops, this extra comparison is redundant: its
results are implicit in the control-flow of the function.
This commit makes two changes: it replaces that icmp with appropriate PHI
nodes, and then makes sure earlyCSE is called after expansion to actually make
use of the opportunities revealed.
I've also added -{arm,aarch64}-enable-atomic-tidy options, so that
existing fragile tests aren't perturbed too much by the change. Many
of them either rely on undef/unreachable too pervasively to be
restored to something well-defined (particularly while making sure
they test the same obscure assert from many years ago), or depend on a
particular CFG shape, which is disrupted by SimplifyCFG.
rdar://problem/16227836
llvm-svn: 209883
22 lines
713 B
LLVM
22 lines
713 B
LLVM
; Tests for the two-address instruction pass.
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; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a9 -arm-atomic-cfg-tidy=0 %s -o - | FileCheck %s
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define void @PR13378() nounwind {
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; This was orriginally a crasher trying to schedule the instructions.
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; CHECK-LABEL: PR13378:
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; CHECK: vld1.32
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; CHECK-NEXT: vst1.32
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; CHECK-NEXT: vst1.32
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; CHECK-NEXT: vmov.f32
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; CHECK-NEXT: vmov.f32
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; CHECK-NEXT: vst1.32
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entry:
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%0 = load <4 x float>* undef, align 4
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store <4 x float> zeroinitializer, <4 x float>* undef, align 4
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store <4 x float> %0, <4 x float>* undef, align 4
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%1 = insertelement <4 x float> %0, float 1.000000e+00, i32 3
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store <4 x float> %1, <4 x float>* undef, align 4
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unreachable
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}
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