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37538d4bfa
* Add masking instructions before loads and stores (in MC layer). * Add masking instructions after SP changes (in MC layer). * Forbid loads, stores and SP changes in delay slots (in MI layer). Differential Revision: http://llvm-reviews.chandlerc.com/D2904 llvm-svn: 203484
72 lines
1.7 KiB
LLVM
72 lines
1.7 KiB
LLVM
; RUN: llc -filetype=asm -mtriple=mipsel-none-linux -relocation-model=static \
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; RUN: -O3 < %s | FileCheck %s
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; RUN: llc -filetype=asm -mtriple=mipsel-none-nacl -relocation-model=static \
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; RUN: -O3 < %s | FileCheck %s -check-prefix=CHECK-NACL
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@x = global i32 0, align 4
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declare void @f1(i32)
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declare void @f2()
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define void @test1() {
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%1 = load i32* @x, align 4
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call void @f1(i32 %1)
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ret void
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; CHECK-LABEL: test1
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; We first make sure that for non-NaCl targets branch-delay slot contains
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; dangerous instructions.
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; Check that branch-delay slot is used to load argument from x before function
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; call.
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; CHECK: jal
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; CHECK-NEXT: lw $4, %lo(x)(${{[0-9]+}})
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; Check that branch-delay slot is used for adjusting sp before return.
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; CHECK: jr $ra
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; CHECK-NEXT: addiu $sp, $sp, {{[0-9]+}}
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; For NaCl, check that branch-delay slot doesn't contain dangerous instructions.
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; CHECK-NACL: jal
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; CHECK-NACL-NEXT: nop
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; CHECK-NACL: jr $ra
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; CHECK-NACL-NEXT: nop
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}
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define void @test2() {
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store i32 1, i32* @x, align 4
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tail call void @f2()
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ret void
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; CHECK-LABEL: test2
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; Check that branch-delay slot is used for storing to x before function call.
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; CHECK: jal
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; CHECK-NEXT: sw ${{[0-9]+}}, %lo(x)(${{[0-9]+}})
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; Check that branch-delay slot is used for adjusting sp before return.
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; CHECK: jr $ra
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; CHECK-NEXT: addiu $sp, $sp, {{[0-9]+}}
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; For NaCl, check that branch-delay slot doesn't contain dangerous instructions.
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; CHECK-NACL: jal
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; CHECK-NACL-NEXT: nop
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; CHECK-NACL: jr $ra
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; CHECK-NACL-NEXT: nop
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}
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