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The PPC backend had been missing a pattern to generate mulli for 64-bit multiples. We had been generating it only for 32-bit multiplies. Unfortunately, generating li + mulld unnecessarily increases register pressure. llvm-svn: 187807
17 lines
435 B
LLVM
17 lines
435 B
LLVM
; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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define i64 @foo(i64 %a) #0 {
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entry:
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%mul = mul nsw i64 %a, 3
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ret i64 %mul
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}
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; CHECK-LABEL: @foo
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; CHECK: mulli 3, 3, 3
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; CHECK: blr
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attributes #0 = { nounwind readnone }
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