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Mirror of https://github.com/RPCS3/llvm-mirror
aa102b103b
Select vector G_SDIV, G_SREM, G_UDIV and G_UREM for MIPS32 with MSA. We have to set bank for vector operands to fprb and selectImpl will do the rest. __builtin_msa_div_s_<format>, __builtin_msa_mod_s_<format>, __builtin_msa_div_u_<format> and __builtin_msa_mod_u_<format> will be transformed into G_SDIV, G_SREM, G_UDIV and G_UREM in legalizeIntrinsic respectively and selected in the same way. Differential Revision: https://reviews.llvm.org/D69333 |
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cmake | ||
docs | ||
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unittests | ||
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.arcconfig | ||
.clang-format | ||
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.gitignore | ||
CMakeLists.txt | ||
CODE_OWNERS.TXT | ||
configure | ||
CREDITS.TXT | ||
LICENSE.TXT | ||
llvm.spec.in | ||
LLVMBuild.txt | ||
README.txt | ||
RELEASE_TESTERS.TXT |
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