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51b479815c
This is required in order to determine during disassembly whether a Reg bead without associated DA bead is referring to a data register. Differential Revision: https://reviews.llvm.org/D98534
101 lines
4.4 KiB
TableGen
101 lines
4.4 KiB
TableGen
//===------- M68kInstrBits.td - Bit Manipulation Instrs --*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This file describes the bit manipulation instructions in the M68k
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/// architecture. Here is the current status of the file:
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///
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/// Machine:
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///
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/// BCNG [ ] BCLR [ ] BSET [ ] BTST [~]
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///
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/// Map:
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///
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/// [ ] - was not touched at all
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/// [!] - requires extarnal stuff implemented
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/// [~] - in progress but usable
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/// [x] - done
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///
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// BTST
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//===----------------------------------------------------------------------===//
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/// ------------+---------+---------+---------+---------
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/// F E D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
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/// ------------+---------+---------+---------+---------
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/// 0 0 0 0 | REG | 1 0 0 | MODE | REG
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/// ------------+---------+---------+---------+---------
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class MxBTSTEnc_R<MxBeadDReg REG, MxEncEA EA, MxEncExt EXT>
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: MxEncoding<EA.Reg, EA.DA, EA.Mode, MxBead3Bits<0b100>, REG, MxBead4Bits<0b0000>,
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EXT.Imm, EXT.B8, EXT.Scale, EXT.WL, EXT.DAReg>;
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/// -------------------------------+---------+---------
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/// F E D C B A 9 8 . 7 6 | 5 4 3 | 2 1 0
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/// -------------------------------+---------+---------
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/// 0 0 0 0 1 0 0 0 . 0 0 | MODE | REG
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/// ------------------------+------+---------+---------
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/// 0 0 0 0 0 0 0 0 | BIT NUMBER
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/// ------------------------+--------------------------
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class MxBTSTEnc_I<MxBead8Imm IMM, MxEncEA EA, MxEncExt EXT>
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: MxEncoding<EA.Reg, EA.DA, EA.Mode, MxBead2Bits<0b00>,
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MxBead4Bits<0b1000>, MxBead4Bits<0b0000>, IMM,
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EXT.Imm, EXT.B8, EXT.Scale, EXT.WL, EXT.DAReg>;
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let Defs = [CCR] in {
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class MxBTST_RR<MxType TYPE>
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: MxInst<(outs), (ins TYPE.ROp:$dst, TYPE.ROp:$bitno), "btst\t$bitno, $dst",
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[(set CCR, (MxBt TYPE.VT:$dst, TYPE.VT:$bitno))],
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MxBTSTEnc_R<MxBeadDReg<1>, MxEncEAd_0, MxExtEmpty>>;
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class MxBTST_RI<MxType TYPE>
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: MxInst<(outs), (ins TYPE.ROp:$dst, TYPE.IOp:$bitno), "btst\t$bitno, $dst",
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[(set CCR, (MxBt TYPE.VT:$dst, TYPE.IPat:$bitno))],
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MxBTSTEnc_I<MxBead8Imm<1>, MxEncEAd_0, MxExtEmpty>>;
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class MxBTST_MR<MxType TYPE, MxOperand MEMOpd, ComplexPattern MEMPat,
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MxEncEA EA, MxEncExt EXT>
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: MxInst<(outs), (ins MEMOpd:$dst, TYPE.ROp:$bitno), "btst\t$bitno, $dst",
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[(set CCR, (MxBt (TYPE.Load MEMPat:$dst), TYPE.VT:$bitno))],
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MxBTSTEnc_R<MxBeadDReg<1>, EA, EXT>>;
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class MxBTST_MI<MxType TYPE, MxOperand MEMOpd, ComplexPattern MEMPat,
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MxEncEA EA, MxEncExt EXT>
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: MxInst<(outs), (ins MEMOpd:$dst, TYPE.IOp:$bitno), "btst\t$bitno, $dst",
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[(set CCR, (MxBt (TYPE.Load MEMPat:$dst), TYPE.IPat:$bitno))],
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MxBTSTEnc_I<MxBead8Imm<1>, EA, EXT>>;
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} // Defs = [CCR]
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// Register BTST limited to 32 bits only
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def BTST32dd : MxBTST_RR<MxType32d>;
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def BTST32di : MxBTST_RI<MxType32d>;
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// Memory BTST limited to 8 bits only
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def BTST8jd : MxBTST_MR<MxType8d, MxType8.JOp, MxType8.JPat,
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MxEncEAj_0, MxExtEmpty>;
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def BTST8pd : MxBTST_MR<MxType8d, MxType8.POp, MxType8.PPat,
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MxEncEAp_0, MxExtI16_0>;
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def BTST8fd : MxBTST_MR<MxType8d, MxType8.FOp, MxType8.FPat,
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MxEncEAf_0, MxExtBrief_0>;
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def BTST8qd : MxBTST_MR<MxType8d, MxType8.QOp, MxType8.QPat,
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MxEncEAq, MxExtI16_0>;
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def BTST8kd : MxBTST_MR<MxType8d, MxType8.KOp, MxType8.KPat,
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MxEncEAk, MxExtBrief_0>;
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def BTST8ji : MxBTST_MI<MxType8d, MxType8.JOp, MxType8.JPat,
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MxEncEAj_0, MxExtEmpty>;
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def BTST8pi : MxBTST_MI<MxType8d, MxType8.POp, MxType8.PPat,
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MxEncEAp_0, MxExtI16_0>;
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def BTST8fi : MxBTST_MI<MxType8d, MxType8.FOp, MxType8.FPat,
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MxEncEAf_0, MxExtBrief_0>;
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def BTST8qi : MxBTST_MI<MxType8d, MxType8.QOp, MxType8.QPat,
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MxEncEAq, MxExtI16_0>;
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def BTST8ki : MxBTST_MI<MxType8d, MxType8.KOp, MxType8.KPat,
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MxEncEAk, MxExtBrief_0>;
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