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1ead7346cd
In particular, this makes the code for 64-bit compares on 32-bit targets
much more efficient.
Example:
define i32 @test_slt(i64 %a, i64 %b) {
entry:
%cmp = icmp slt i64 %a, %b
br i1 %cmp, label %bb1, label %bb2
bb1:
ret i32 1
bb2:
ret i32 2
}
Before this patch:
test_slt:
movl 4(%esp), %eax
movl 8(%esp), %ecx
cmpl 12(%esp), %eax
setae %al
cmpl 16(%esp), %ecx
setge %cl
je .LBB2_2
movb %cl, %al
.LBB2_2:
testb %al, %al
jne .LBB2_4
movl $1, %eax
retl
.LBB2_4:
movl $2, %eax
retl
After this patch:
test_slt:
movl 4(%esp), %eax
movl 8(%esp), %ecx
cmpl 12(%esp), %eax
sbbl 16(%esp), %ecx
jge .LBB1_2
movl $1, %eax
retl
.LBB1_2:
movl $2, %eax
retl
Differential Revision: http://reviews.llvm.org/D14496
llvm-svn: 253572
131 lines
2.7 KiB
LLVM
131 lines
2.7 KiB
LLVM
; RUN: llc -mtriple=i686-linux-gnu %s -o - | FileCheck %s
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define i32 @branch_eq(i64 %a, i64 %b) {
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entry:
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%cmp = icmp eq i64 %a, %b
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br i1 %cmp, label %bb1, label %bb2
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bb1:
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ret i32 1
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bb2:
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ret i32 2
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; CHECK-LABEL: branch_eq:
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; CHECK: movl 4(%esp), [[LHSLo:%[a-z]+]]
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; CHECK: movl 8(%esp), [[LHSHi:%[a-z]+]]
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; CHECK: xorl 16(%esp), [[LHSHi]]
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; CHECK: xorl 12(%esp), [[LHSLo]]
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; CHECK: orl [[LHSHi]], [[LHSLo]]
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; CHECK: jne [[FALSE:.LBB[0-9_]+]]
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; CHECK: movl $1, %eax
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; CHECK: retl
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; CHECK: [[FALSE]]:
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; CHECK: movl $2, %eax
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; CHECK: retl
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}
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define i32 @branch_slt(i64 %a, i64 %b) {
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entry:
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%cmp = icmp slt i64 %a, %b
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br i1 %cmp, label %bb1, label %bb2
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bb1:
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ret i32 1
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bb2:
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ret i32 2
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; CHECK-LABEL: branch_slt:
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; CHECK: movl 4(%esp), [[LHSLo:%[a-z]+]]
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; CHECK: movl 8(%esp), [[LHSHi:%[a-z]+]]
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; CHECK: cmpl 12(%esp), [[LHSLo]]
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; CHECK: sbbl 16(%esp), [[LHSHi]]
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; CHECK: jge [[FALSE:.LBB[0-9_]+]]
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; CHECK: movl $1, %eax
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; CHECK: retl
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; CHECK: [[FALSE]]:
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; CHECK: movl $2, %eax
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; CHECK: retl
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}
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define i32 @branch_ule(i64 %a, i64 %b) {
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entry:
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%cmp = icmp ule i64 %a, %b
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br i1 %cmp, label %bb1, label %bb2
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bb1:
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ret i32 1
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bb2:
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ret i32 2
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; CHECK-LABEL: branch_ule:
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; CHECK: movl 12(%esp), [[RHSLo:%[a-z]+]]
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; CHECK: movl 16(%esp), [[RHSHi:%[a-z]+]]
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; CHECK: cmpl 4(%esp), [[RHSLo]]
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; CHECK: sbbl 8(%esp), [[RHSHi]]
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; CHECK: jb [[FALSE:.LBB[0-9_]+]]
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; CHECK: movl $1, %eax
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; CHECK: retl
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; CHECK: [[FALSE]]:
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; CHECK: movl $2, %eax
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; CHECK: retl
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}
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define i32 @set_gt(i64 %a, i64 %b) {
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entry:
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%cmp = icmp sgt i64 %a, %b
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%res = select i1 %cmp, i32 1, i32 0
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ret i32 %res
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; CHECK-LABEL: set_gt:
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; CHECK: movl 12(%esp), [[RHSLo:%[a-z]+]]
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; CHECK: movl 16(%esp), [[RHSHi:%[a-z]+]]
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; CHECK: cmpl 4(%esp), [[RHSLo]]
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; CHECK: sbbl 8(%esp), [[RHSHi]]
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; CHECK: setl %al
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; CHECK: retl
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}
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define i32 @test_wide(i128 %a, i128 %b) {
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entry:
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%cmp = icmp slt i128 %a, %b
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br i1 %cmp, label %bb1, label %bb2
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bb1:
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ret i32 1
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bb2:
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ret i32 2
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; CHECK-LABEL: test_wide:
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; CHECK: cmpl 24(%esp)
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; CHECK: sbbl 28(%esp)
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; CHECK: sbbl 32(%esp)
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; CHECK: sbbl 36(%esp)
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; CHECK: jge [[FALSE:.LBB[0-9_]+]]
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; CHECK: movl $1, %eax
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; CHECK: retl
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; CHECK: [[FALSE]]:
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; CHECK: movl $2, %eax
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; CHECK: retl
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}
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define i32 @test_carry_false(i64 %a, i64 %b) {
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entry:
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%x = and i64 %a, -4294967296 ;0xffffffff00000000
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%y = and i64 %b, -4294967296
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%cmp = icmp slt i64 %x, %y
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br i1 %cmp, label %bb1, label %bb2
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bb1:
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ret i32 1
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bb2:
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ret i32 2
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; The comparison of the low bits will be folded to a CARRY_FALSE node. Make
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; sure the code can handle that.
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; CHECK-LABEL: carry_false:
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; CHECK: movl 8(%esp), [[LHSHi:%[a-z]+]]
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; CHECK: cmpl 16(%esp), [[LHSHi]]
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; CHECK: jge [[FALSE:.LBB[0-9_]+]]
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; CHECK: movl $1, %eax
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; CHECK: retl
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; CHECK: [[FALSE]]:
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; CHECK: movl $2, %eax
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; CHECK: retl
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}
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