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llvm-mirror/test/CodeGen/X86/widen_conv-2.ll
Simon Pilgrim a825efbf95 [X86][SSE] Vectorized i64 uniform constant SRA shifts
This patch adds vectorization support for uniform constant i64 arithmetic shift right operators.

Differential Revision: http://reviews.llvm.org/D9645

llvm-svn: 241514
2015-07-06 22:35:19 +00:00

14 lines
396 B
LLVM

; RUN: llc < %s -march=x86 -mattr=+sse4.2 | FileCheck %s
; CHECK: psllq $48, %xmm0
; CHECK: psrad $16, %xmm0
; CHECK: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
; sign extension v2i16 to v2i32
define void @convert(<2 x i32>* %dst.addr, <2 x i16> %src) nounwind {
entry:
%signext = sext <2 x i16> %src to <2 x i32> ; <<12 x i8>> [#uses=1]
store <2 x i32> %signext, <2 x i32>* %dst.addr
ret void
}