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9af311f3de
Add the Lanai backend to lib/Target. General Lanai backend discussion on llvm-dev thread "[RFC] Lanai backend" (http://lists.llvm.org/pipermail/llvm-dev/2016-February/095118.html). Differential Revision: http://reviews.llvm.org/D17011 llvm-svn: 264578
61 lines
1.2 KiB
LLVM
61 lines
1.2 KiB
LLVM
; RUN: llc -march=lanai < %s | FileCheck %s
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; Test the in place lowering of mul i32.
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define i32 @f6(i32 inreg %a) #0 {
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entry:
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%mul = mul nsw i32 %a, 6
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ret i32 %mul
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}
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; CHECK: sh %r6, 0x1, %r{{[0-9]+}}
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; CHECK: sh %r6, 0x3, %r{{[0-9]+}}
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; CHECK: sub %r{{[0-9]+}}, %r{{[0-9]+}}, %rv
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define i32 @f7(i32 inreg %a) #0 {
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entry:
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%mul = mul nsw i32 %a, 7
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ret i32 %mul
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}
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; CHECK: sh %r6, 0x3, %r{{[0-9]+}}
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; CHECK: sub %r{{[0-9]+}}, %r6, %rv
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define i32 @f8(i32 inreg %a) #0 {
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entry:
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%mul = shl nsw i32 %a, 3
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ret i32 %mul
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}
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; CHECK: sh %r6, 0x3, %rv
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define i32 @fm6(i32 inreg %a) #0 {
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entry:
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%mul = mul nsw i32 %a, -6
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ret i32 %mul
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}
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; CHECK: sh %r6, 0x3, %r{{[0-9]+}}
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; CHECK: sh %r6, 0x1, %r{{[0-9]+}}
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; CHECK: sub %r{{[0-9]+}}, %r{{[0-9]+}}, %rv
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define i32 @fm7(i32 inreg %a) #0 {
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entry:
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%mul = mul nsw i32 %a, -7
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ret i32 %mul
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}
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; CHECK: sh %r6, 0x3, %r{{[0-9]+}}
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; CHECK: sub %r6, %r{{[0-9]+}}, %rv
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define i32 @fm8(i32 inreg %a) #0 {
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entry:
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%mul = mul nsw i32 %a, -8
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ret i32 %mul
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}
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; CHECK: sh %r6, 0x3, %r{{[0-9]+}}
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; CHECK: sub %r{{[0-9]+}}, %r{{[0-9]+}}, %rv
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define i32 @h1(i32 inreg %a) #0 {
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entry:
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%mul = mul i32 %a, -1431655765
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ret i32 %mul
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}
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; CHECK: h1
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; CHECK: mulsi3
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