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10839866a1
This patch implements initial backend support for a -mtune CPU controlled by a "tune-cpu" function attribute. If the attribute is not present X86 will use the resolved CPU from target-cpu attribute or command line. This patch adds MC layer support a tune CPU. Each CPU now has two sets of features stored in their GenSubtargetInfo.inc tables . These features lists are passed separately to the Processor and ProcessorModel classes in tablegen. The tune list defaults to an empty list to avoid changes to non-X86. This annoyingly increases the size of static tables on all target as we now store 24 more bytes per CPU. I haven't quantified the overall impact, but I can if we're concerned. One new test is added to X86 to show a few tuning features with mismatched tune-cpu and target-cpu/target-feature attributes to demonstrate independent control. Another new test is added to demonstrate that the scheduler model follows the tune CPU. I have not added a -mtune to llc/opt or MC layer command line yet. With no attributes we'll just use the -mcpu for both. MC layer tools will always follow the normal CPU for tuning. Differential Revision: https://reviews.llvm.org/D85165
126 lines
4.2 KiB
C++
126 lines
4.2 KiB
C++
//===-- AVRSubtarget.h - Define Subtarget for the AVR -----------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the AVR specific subclass of TargetSubtargetInfo.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_AVR_SUBTARGET_H
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#define LLVM_AVR_SUBTARGET_H
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/Target/TargetMachine.h"
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#include "AVRFrameLowering.h"
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#include "AVRISelLowering.h"
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#include "AVRInstrInfo.h"
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#include "AVRSelectionDAGInfo.h"
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#define GET_SUBTARGETINFO_HEADER
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#include "AVRGenSubtargetInfo.inc"
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namespace llvm {
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/// A specific AVR target MCU.
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class AVRSubtarget : public AVRGenSubtargetInfo {
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public:
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//! Creates an AVR subtarget.
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//! \param TT The target triple.
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//! \param CPU The CPU to target.
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//! \param FS The feature string.
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//! \param TM The target machine.
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AVRSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS,
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const AVRTargetMachine &TM);
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const AVRInstrInfo *getInstrInfo() const override { return &InstrInfo; }
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const TargetFrameLowering *getFrameLowering() const override { return &FrameLowering; }
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const AVRTargetLowering *getTargetLowering() const override { return &TLInfo; }
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const AVRSelectionDAGInfo *getSelectionDAGInfo() const override { return &TSInfo; }
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const AVRRegisterInfo *getRegisterInfo() const override { return &InstrInfo.getRegisterInfo(); }
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/// Parses a subtarget feature string, setting appropriate options.
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/// \note Definition of function is auto generated by `tblgen`.
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void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS);
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AVRSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS,
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const TargetMachine &TM);
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// Subtarget feature getters.
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// See AVR.td for details.
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bool hasSRAM() const { return m_hasSRAM; }
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bool hasJMPCALL() const { return m_hasJMPCALL; }
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bool hasIJMPCALL() const { return m_hasIJMPCALL; }
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bool hasEIJMPCALL() const { return m_hasEIJMPCALL; }
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bool hasADDSUBIW() const { return m_hasADDSUBIW; }
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bool hasSmallStack() const { return m_hasSmallStack; }
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bool hasMOVW() const { return m_hasMOVW; }
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bool hasLPM() const { return m_hasLPM; }
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bool hasLPMX() const { return m_hasLPMX; }
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bool hasELPM() const { return m_hasELPM; }
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bool hasELPMX() const { return m_hasELPMX; }
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bool hasSPM() const { return m_hasSPM; }
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bool hasSPMX() const { return m_hasSPMX; }
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bool hasDES() const { return m_hasDES; }
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bool supportsRMW() const { return m_supportsRMW; }
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bool supportsMultiplication() const { return m_supportsMultiplication; }
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bool hasBREAK() const { return m_hasBREAK; }
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bool hasTinyEncoding() const { return m_hasTinyEncoding; }
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bool hasMemMappedGPR() const { return m_hasMemMappedGPR; }
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uint8_t getIORegisterOffset() const { return hasMemMappedGPR() ? 0x20 : 0x0; }
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/// Gets the ELF architecture for the e_flags field
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/// of an ELF object file.
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unsigned getELFArch() const {
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assert(ELFArch != 0 &&
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"every device must have an associate ELF architecture");
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return ELFArch;
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}
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private:
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/// The ELF e_flags architecture.
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unsigned ELFArch;
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// Subtarget feature settings
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// See AVR.td for details.
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bool m_hasSRAM;
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bool m_hasJMPCALL;
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bool m_hasIJMPCALL;
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bool m_hasEIJMPCALL;
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bool m_hasADDSUBIW;
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bool m_hasSmallStack;
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bool m_hasMOVW;
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bool m_hasLPM;
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bool m_hasLPMX;
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bool m_hasELPM;
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bool m_hasELPMX;
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bool m_hasSPM;
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bool m_hasSPMX;
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bool m_hasDES;
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bool m_supportsRMW;
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bool m_supportsMultiplication;
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bool m_hasBREAK;
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bool m_hasTinyEncoding;
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bool m_hasMemMappedGPR;
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// Dummy member, used by FeatureSet's. We cannot have a SubtargetFeature with
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// no variable, so we instead bind pseudo features to this variable.
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bool m_FeatureSetDummy;
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AVRInstrInfo InstrInfo;
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AVRFrameLowering FrameLowering;
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AVRTargetLowering TLInfo;
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AVRSelectionDAGInfo TSInfo;
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};
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} // end namespace llvm
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#endif // LLVM_AVR_SUBTARGET_H
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