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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 19:23:23 +01:00
llvm-mirror/test/CodeGen
Anton Korobeynikov ab90a05ff3 Add rotates
llvm-svn: 75981
2009-07-16 14:06:49 +00:00
..
Alpha
ARM fix an arm codegen bug (the same as PR4482 on ppc) where available_externally 2009-07-15 04:12:33 +00:00
CBackend Fix an erroneous check for isFNeg; the FNeg case is handled 2009-06-04 23:43:29 +00:00
CellSPU Add some generic expansion logic for SMULO and UMULO. Fixes UMULO 2009-06-16 06:58:29 +00:00
CPP
Generic remove tests for removed intrinsics. 2009-07-12 21:30:06 +00:00
IA64
Mips Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
MSP430 Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
PowerPC get the PPC stub temporary label from the mangler instead of 2009-07-15 02:56:53 +00:00
SPARC Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
SystemZ Add rotates 2009-07-16 14:06:49 +00:00
Thumb Smarter isel of ldrsb / ldrsh. Only make use of these when [r,r] address is feasible. 2009-07-11 07:08:13 +00:00
Thumb2 Fix detection of valid BFC immediates. 2009-07-14 00:57:56 +00:00
X86 Let callers decide the sub-register index on the def operand of rematerialized instructions. 2009-07-16 09:20:10 +00:00
XCore Combine an unaligned store of unaligned load into a memmove. 2009-07-16 12:50:48 +00:00