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llvm-mirror/include
Alex Bradbury 78e18785d2 [RISCV] Implement codegen for cmpxchg on RV32IA
Utilise a similar ('late') lowering strategy to D47882. The changes to 
AtomicExpandPass allow this strategy to be utilised by other targets which 
implement shouldExpandAtomicCmpXchgInIR.

All cmpxchg are lowered as 'strong' currently and failure ordering is ignored. 
This is conservative but correct.

Differential Revision: https://reviews.llvm.org/D48131

llvm-svn: 347914
2018-11-29 20:43:42 +00:00
..
llvm [RISCV] Implement codegen for cmpxchg on RV32IA 2018-11-29 20:43:42 +00:00
llvm-c [IR] Add a dedicated FNeg IR Instruction 2018-11-13 18:15:47 +00:00