mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-01 08:23:21 +01:00
ac057f13a5
llvm-svn: 139250
301 lines
4.5 KiB
Plaintext
301 lines
4.5 KiB
Plaintext
# RUN: llvm-mc --disassemble %s -triple=thumbv7-apple-darwin9 -mattr +t2xtpk,+mp | FileCheck %s
|
|
|
|
# CHECK: add r5, sp, #68
|
|
0x11 0xad
|
|
|
|
# CHECK: adcs r0, r0, #1
|
|
0x50 0xf1 0x01 0x00
|
|
|
|
# CHECK: b #30
|
|
0x0f 0xe0
|
|
|
|
# CHECK: bgt.w #-16
|
|
0x3f 0xf7 0xf8 0xaf
|
|
|
|
# CHECK: bfc r0, #10, #10
|
|
0x6f 0xf3 0x93 0x20
|
|
|
|
# CHECK: bfi r2, r10, #0, #1
|
|
0x6a 0xf3 0x00 0x02
|
|
|
|
# CHECK: cbnz r7, #20
|
|
0x57 0xb9
|
|
|
|
# CHECK: cmp r3, r4
|
|
0xa3 0x42
|
|
|
|
# CHECK: cmn.w r0, #31
|
|
0x10 0xf1 0x1f 0x0f
|
|
|
|
# CHECK: ldm r0!, {r1}
|
|
0x02 0xc8
|
|
|
|
# CHECK: ldr r5, #432
|
|
0x6c 0x4d
|
|
|
|
# CHECK: str r0, [r3]
|
|
0x18 0x60
|
|
|
|
# CHECK: str r0, [r3, #4]
|
|
0x58 0x60
|
|
|
|
# CHECK: str r2, [r5, r3]
|
|
0xea 0x50
|
|
|
|
# CHECK: ldrb.w r8, #-24
|
|
0x1f 0xf8 0x18 0x80
|
|
|
|
# CHECK: ldrd r0, r1, [r7, #64]!
|
|
0xf7 0xe9 0x10 0x01
|
|
|
|
# CHECK: lsls.w r0, r5, #1
|
|
0x5f 0xea 0x45 0x00
|
|
|
|
# CHECK: mov r11, r7
|
|
0xbb 0x46
|
|
|
|
# CHECK: pkhtb r2, r4, r6, asr #16
|
|
0xc4 0xea 0x26 0x42
|
|
|
|
# CHECK-NOT: pkhbt r2, r4, r6, lsl #0
|
|
# CHECK: pkhbt r2, r4, r6
|
|
0xc4 0xea 0x06 0x02
|
|
|
|
# CHECK: pop.w {r2, r4, r6, r8, r10, r12}
|
|
0xbd 0xe8 0x54 0x15
|
|
|
|
# CHECK: push.w {r2, r4, r6, r8, r10, r12}
|
|
0x2d 0xe9 0x54 0x15
|
|
|
|
# CHECK: rsbs r0, r0, #0
|
|
0x40 0x42
|
|
|
|
# CHECK-NOT: rsb r0, r2, r0, lsl #0
|
|
# CHECK: rsb r0, r2, r0
|
|
0xc2 0xeb 0x00 0x00
|
|
|
|
# CHECK-NOT: ssat r0, #17, r12, lsl #0
|
|
# CHECK: ssat r0, #17, r12
|
|
0x0c 0xf3 0x10 0x00
|
|
|
|
# CHECK: strd r0, r1, [r7, #64]
|
|
0xc7 0xe9 0x10 0x01
|
|
|
|
# CHECK: sub sp, #60
|
|
0x8f 0xb0
|
|
|
|
# CHECK: subw r0, pc, #1
|
|
0xaf 0xf2 0x01 0x00
|
|
|
|
# CHECK: subw r0, sp, #835
|
|
0xad 0xf2 0x43 0x30
|
|
|
|
# CHECK: uqadd16 r3, r4, r5
|
|
0x94 0xfa 0x55 0xf3
|
|
|
|
# CHECK: usada8 r5, r4, r3, r2
|
|
0x74 0xfb 0x03 0x25
|
|
|
|
# CHECK: uxtab16 r1, r2, r3, ror #8
|
|
0x32 0xfa 0x93 0xf1
|
|
|
|
# IT block begin
|
|
# CHECK: ittte eq
|
|
0x03 0xbf
|
|
|
|
# CHECK: moveq r3, #3
|
|
0x03 0x23
|
|
|
|
# CHECK: asreq r1, r0, #5
|
|
0x41 0x11
|
|
|
|
# CHECK: lsleq r1, r0, #28
|
|
0x01 0x07
|
|
|
|
# CHECK: stmne r0!, {r1, r2, r3}
|
|
0x0e 0xc0
|
|
|
|
# IT block end
|
|
# CHECK: rsbs r1, r2, #0
|
|
0x51 0x42
|
|
|
|
# CHECK: cpsid.w f
|
|
0xaf 0xf3 0x20 0x86
|
|
|
|
# CHECK: cps #15
|
|
0xaf 0xf3 0x0f 0x81
|
|
|
|
# CHECK: cpsie.w if, #10
|
|
0xaf 0xf3 0x6a 0x85
|
|
|
|
# CHECK: cpsie aif
|
|
0x67 0xb6
|
|
|
|
# CHECK: msr CPSR_fc, r0
|
|
0x80 0xf3 0x00 0x89
|
|
|
|
# CHECK: blx #-4
|
|
0xff 0xf7 0xfe 0xef
|
|
|
|
# CHECK: vpush {d8, d9, d10}
|
|
0x2d 0xed 0x06 0x8b
|
|
|
|
# CHECK: vcmpe.f64 d8, #0
|
|
0xb5 0xee 0xc0 0x8b
|
|
|
|
# CHECK: stmdb sp, {r0, r2, r3, r8, r11, lr}
|
|
0x0d 0xe9 0x0d 0x49
|
|
|
|
# CHECK: stm r5!, {r0, r1, r2, r3, r4}
|
|
0x1f 0xc5
|
|
|
|
# CHECK: ldm r5, {r0, r1, r2, r3, r4, r5}
|
|
0x3f 0xcd
|
|
|
|
# CHECK: ldm r5!, {r0, r1, r2, r3, r4}
|
|
0x1f 0xcd
|
|
|
|
# CHECK: addw r0, pc, #1050
|
|
0x0f 0xf2 0x1a 0x40
|
|
|
|
# CHECK: ldrd r3, r8, [r11, #-60]
|
|
0x5b 0xe9 0x0f 0x38
|
|
|
|
# CHECK: ldrex r8, [r2]
|
|
0x52 0xe8 0x00 0x8f
|
|
|
|
# CHECK: ldrexd r8, r9, [r2]
|
|
0xd2 0xe8 0x7f 0x89
|
|
|
|
# CHECK: strexd r1, r7, r8, [r2]
|
|
0xc2 0xe8 0x71 0x78
|
|
|
|
# CHECK: tbh [r5, r4, lsl #1]
|
|
0xd5 0xe8 0x14 0xf0
|
|
|
|
# CHECK: tbb [r5, r4]
|
|
0xd5 0xe8 0x04 0xf0
|
|
|
|
# CHECK: ldr.w r4, [sp, r4, lsl #3]
|
|
0x5d 0xf8 0x34 0x40
|
|
|
|
# CHECK: ldr.w r5, [r6, #30]
|
|
0xd6 0xf8 0x1e 0x50
|
|
|
|
# CHECK: ldrh.w r5, [r6, #30]
|
|
0xb6 0xf8 0x1e 0x50
|
|
|
|
# CHECK: ldrt r5, [r6, #30]
|
|
0x56 0xf8 0x1e 0x5e
|
|
|
|
# CHECK: ldr r5, [r6, #-30]
|
|
0x56 0xf8 0x1e 0x5c
|
|
|
|
# CHECK: sel r7, r3, r5
|
|
0xa3 0xfa 0x85 0xf7
|
|
|
|
# CHECK: lsl.w r7, r3, r5
|
|
0x03 0xfa 0x05 0xf7
|
|
|
|
# CHECK: adds.w r7, r3, r5
|
|
0x13 0xeb 0x05 0x07
|
|
|
|
# CHECK: smlabt r4, r3, r2, r1
|
|
0x13 0xfb 0x12 0x14
|
|
|
|
# CHECK: smmulr r7, r8, r9
|
|
0x58 0xfb 0x19 0xf7
|
|
|
|
# CHECK: umull r1, r2, r3, r4
|
|
0xa3 0xfb 0x04 0x12
|
|
|
|
# CHECK: pld [r5, r0, lsl #1]
|
|
0x15 0xf8 0x10 0xf0
|
|
|
|
# CHECK: pld [pc, #-16]
|
|
0x1f 0xf8 0x10 0xf0
|
|
|
|
# CHECK: pld [r5, #30]
|
|
0x95 0xf8 0x1e 0xf0
|
|
|
|
# Test disabled as it was originally checking for
|
|
# the ARM encoding of stc2, and thumb2 stc2 is
|
|
# not implemented yet.
|
|
# CHECK-: stc2 p12, cr15, [r9], {137}
|
|
#0x89 0xfc 0x89 0xfc
|
|
|
|
# CHECK: vmov r1, r0, d11
|
|
0x50 0xec 0x1b 0x1b
|
|
|
|
# CHECK: dsb nsh
|
|
0xbf 0xf3 0x47 0x8f
|
|
|
|
# CHECK: isb
|
|
0xbf 0xf3 0x6f 0x8f
|
|
|
|
# CHECK: asrs r1, r0, #32
|
|
0x1 0x10
|
|
|
|
# CHECK: lsr.w r10, r0, #32
|
|
0x4f 0xea 0x10 0x0a
|
|
|
|
# CHECK: blx sp
|
|
0xe8 0x47
|
|
|
|
# CHECK: bx lr
|
|
0x70 0x47
|
|
|
|
# CHECK: bx pc
|
|
0x78 0x47
|
|
|
|
# CHECK: svc #230
|
|
0xe6 0xdf
|
|
|
|
# CHECK: rfedb lr
|
|
0x1e 0xe8 0x00 0xc0
|
|
|
|
# CHECK: mov.w r3, #4294967295
|
|
0x4f 0xf0 0xff 0x33
|
|
|
|
# CHECK: mov pc, sp
|
|
0xef 0x46
|
|
|
|
# CHECK: nop
|
|
0x00 0xbf
|
|
|
|
# CHECK: nop.w
|
|
0xaf 0xf3 0x00 0x80
|
|
|
|
# CHECK: bne #24
|
|
0x0c 0xd1
|
|
|
|
# CHECK: vadd.f32 q0, q1, q2
|
|
0x02 0xef 0x44 0x0d
|
|
|
|
# CHECK: ldrsb r1, [r0, r0]
|
|
0x01 0x56
|
|
|
|
# CHECK: ldrsh r1, [r0, r0]
|
|
0x01 0x5E
|
|
|
|
# CHECK: and.w r5, r1, r10, ror #7
|
|
0x1 0xea 0xfa 0x95
|
|
|
|
# CHECK: ldrsh r6, [sp], #81
|
|
0x3d 0xf9 0x51 0x6b
|
|
|
|
# CHECK: usat16 r4, #10, r1
|
|
0xa1 0xf3 0x2a 0x4
|
|
|
|
# CHECK: smlad r5, r12, r8, r11
|
|
0x2c 0xfb 0x8 0xb5
|
|
|
|
# CHECK: teq.w r0, r11
|
|
0x90 0xea 0xb 0x8f
|
|
|
|
# CHECK: uxtb16 r9, r12, ror #16
|
|
0x3f 0xfa 0xec 0xf9
|
|
|
|
# CHECK: pldw [r11, r12, lsl #2]
|
|
0x3b 0xf8 0x2c 0xf0
|