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8b0272c1bb
Differential Revision: https://reviews.llvm.org/D99557
90 lines
2.7 KiB
TableGen
90 lines
2.7 KiB
TableGen
//===-- RISCVScheduleB.td - RISCV Scheduling Definitions B -*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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/// Define scheduler resources associated with def operands.
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// Zba extension
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def WriteSHXADD : SchedWrite; // sh1add/sh2add/sh3add
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def WriteSHXADD32 : SchedWrite; // sh1add.uw/sh2add.uw/sh3add.uw
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// Zbb extension
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def WriteRotateImm : SchedWrite;
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def WriteRotateImm32 : SchedWrite;
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def WriteRotateReg : SchedWrite;
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def WriteRotateReg32 : SchedWrite;
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def WriteCLZ : SchedWrite;
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def WriteCLZ32 : SchedWrite;
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def WriteCTZ : SchedWrite;
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def WriteCTZ32 : SchedWrite;
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def WriteCPOP : SchedWrite;
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def WriteCPOP32 : SchedWrite;
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def WriteREV8 : SchedWrite;
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def WriteORCB : SchedWrite;
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/// Define scheduler resources associated with use operands.
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// Zba extension
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def ReadSHXADD : SchedRead; // sh1add/sh2add/sh3add
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def ReadSHXADD32 : SchedRead; // sh1add.uw/sh2add.uw/sh3add.uw
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// Zbb extension
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def ReadRotateImm : SchedRead;
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def ReadRotateImm32 : SchedRead;
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def ReadRotateReg : SchedRead;
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def ReadRotateReg32 : SchedRead;
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def ReadCLZ : SchedRead;
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def ReadCLZ32 : SchedRead;
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def ReadCTZ : SchedRead;
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def ReadCTZ32 : SchedRead;
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def ReadCPOP : SchedRead;
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def ReadCPOP32 : SchedRead;
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def ReadREV8 : SchedRead;
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def ReadORCB : SchedRead;
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/// Define default scheduler resources for B.
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multiclass UnsupportedSchedZba {
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let Unsupported = true in {
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def : WriteRes<WriteSHXADD, []>;
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def : WriteRes<WriteSHXADD32, []>;
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def : ReadAdvance<ReadSHXADD, 0>;
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def : ReadAdvance<ReadSHXADD32, 0>;
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}
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}
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multiclass UnsupportedSchedZbb {
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let Unsupported = true in {
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def : WriteRes<WriteRotateImm, []>;
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def : WriteRes<WriteRotateImm32, []>;
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def : WriteRes<WriteRotateReg, []>;
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def : WriteRes<WriteRotateReg32, []>;
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def : WriteRes<WriteCLZ, []>;
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def : WriteRes<WriteCLZ32, []>;
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def : WriteRes<WriteCTZ, []>;
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def : WriteRes<WriteCTZ32, []>;
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def : WriteRes<WriteCPOP, []>;
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def : WriteRes<WriteCPOP32, []>;
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def : WriteRes<WriteREV8, []>;
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def : WriteRes<WriteORCB, []>;
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def : ReadAdvance<ReadRotateImm, 0>;
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def : ReadAdvance<ReadRotateImm32, 0>;
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def : ReadAdvance<ReadRotateReg, 0>;
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def : ReadAdvance<ReadRotateReg32, 0>;
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def : ReadAdvance<ReadCLZ, 0>;
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def : ReadAdvance<ReadCLZ32, 0>;
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def : ReadAdvance<ReadCTZ, 0>;
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def : ReadAdvance<ReadCTZ32, 0>;
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def : ReadAdvance<ReadCPOP, 0>;
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def : ReadAdvance<ReadCPOP32, 0>;
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def : ReadAdvance<ReadREV8, 0>;
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def : ReadAdvance<ReadORCB, 0>;
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}
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}
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