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e5314eb2c2
XMM registers. There are many known deficiencies and fixmes, which will be
addressed ASAP. The major benefit of this work is that it will allow the
LLVM register allocator to allocate FP registers across basic blocks.
The x86 backend will still default to x87 style FP. To enable this work,
you must pass -enable-sse-scalar-fp and either -sse2 or -sse3 to llc.
An example before and after would be for:
double foo(double *P) { double Sum = 0; int i; for (i = 0; i < 1000; ++i)
Sum += P[i]; return Sum; }
The inner loop looks like the following:
x87:
.LBB_foo_1: # no_exit
fldl (%esp)
faddl (%eax,%ecx,8)
fstpl (%esp)
incl %ecx
cmpl $1000, %ecx
#FP_REG_KILL
jne .LBB_foo_1 # no_exit
SSE2:
addsd (%eax,%ecx,8), %xmm0
incl %ecx
cmpl $1000, %ecx
#FP_REG_KILL
jne .LBB_foo_1 # no_exit
llvm-svn: 22340
95 lines
3.5 KiB
C++
95 lines
3.5 KiB
C++
//===-- TargetMachine.cpp - General Target Information ---------------------==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file describes the general parts of a Target machine.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Type.h"
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#include "llvm/CodeGen/IntrinsicLowering.h"
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#include "llvm/Support/CommandLine.h"
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using namespace llvm;
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//---------------------------------------------------------------------------
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// Command-line options that tend to be useful on more than one back-end.
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//
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namespace llvm {
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bool PrintMachineCode;
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bool NoFramePointerElim;
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bool NoExcessFPPrecision;
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int PatternISelTriState;
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bool UnsafeFPMath;
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bool PICEnabled;
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};
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namespace {
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cl::opt<bool, true> PrintCode("print-machineinstrs",
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cl::desc("Print generated machine code"),
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cl::location(PrintMachineCode), cl::init(false));
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cl::opt<bool, true>
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DisableFPElim("disable-fp-elim",
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cl::desc("Disable frame pointer elimination optimization"),
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cl::location(NoFramePointerElim),
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cl::init(false));
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cl::opt<bool, true>
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DisableExcessPrecision("disable-excess-fp-precision",
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cl::desc("Disable optimizations that may increase FP precision"),
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cl::location(NoExcessFPPrecision),
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cl::init(false));
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cl::opt<int, true> PatternISel("enable-pattern-isel",
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cl::desc("Turn the pattern ISel off(0), on(1), default(2)"),
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cl::location(PatternISelTriState),
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cl::init(2));
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cl::opt<bool, true>
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EnableUnsafeFPMath("enable-unsafe-fp-math",
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cl::desc("Enable optimizations that may decrease FP precision"),
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cl::location(UnsafeFPMath),
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cl::init(false));
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cl::opt<bool, true>
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EnablePIC("enable-pic",
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cl::desc("Enable generation of position independant code"),
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cl::location(PICEnabled),
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cl::init(false));
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};
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//---------------------------------------------------------------------------
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// TargetMachine Class
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//
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TargetMachine::TargetMachine(const std::string &name, IntrinsicLowering *il,
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bool LittleEndian,
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unsigned char PtrSize, unsigned char PtrAl,
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unsigned char DoubleAl, unsigned char FloatAl,
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unsigned char LongAl, unsigned char IntAl,
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unsigned char ShortAl, unsigned char ByteAl,
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unsigned char BoolAl)
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: Name(name), DataLayout(name, LittleEndian,
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PtrSize, PtrAl, DoubleAl, FloatAl, LongAl,
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IntAl, ShortAl, ByteAl, BoolAl) {
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IL = il ? il : new DefaultIntrinsicLowering();
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}
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TargetMachine::TargetMachine(const std::string &name, IntrinsicLowering *il,
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const TargetData &TD)
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: Name(name), DataLayout(TD) {
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IL = il ? il : new DefaultIntrinsicLowering();
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}
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TargetMachine::TargetMachine(const std::string &name, IntrinsicLowering *il,
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const Module &M)
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: Name(name), DataLayout(name, &M) {
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IL = il ? il : new DefaultIntrinsicLowering();
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}
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TargetMachine::~TargetMachine() {
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delete IL;
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}
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