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38ec4d9a41
When computing currently-live registers, the register scavenger excludes undef uses. As a result, undef uses are ignored when computing the restore points of registers spilled into the emergency slots. While the register scavenger normally excludes from consideration, when scavenging, registers used by the current instruction, we need to not exclude undef uses. Otherwise, we might end up requiring more emergency spill slots than we have (in the case where the undef use *is* the currently-spilled register). Another bug found by llvm-stress. llvm-svn: 186067
49 lines
1.5 KiB
LLVM
49 lines
1.5 KiB
LLVM
; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s
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target triple = "powerpc64-unknown-linux-gnu"
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define void @autogen_SD156869(i8*, i64*) {
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BB:
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%A3 = alloca <2 x i1>
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%A2 = alloca <8 x i32>
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br label %CF
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CF: ; preds = %CF85, %CF, %BB
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br i1 undef, label %CF, label %CF82.critedge
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CF82.critedge: ; preds = %CF
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store i8 -59, i8* %0
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br label %CF82
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CF82: ; preds = %CF82, %CF82.critedge
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%L17 = load i8* %0
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%E18 = extractelement <2 x i64> undef, i32 0
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%PC = bitcast <2 x i1>* %A3 to i64*
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br i1 undef, label %CF82, label %CF84.critedge
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CF84.critedge: ; preds = %CF82
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store i64 455385, i64* %PC
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br label %CF84
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CF84: ; preds = %CF84, %CF84.critedge
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%L40 = load i64* %PC
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store i64 -1, i64* %PC
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%Sl46 = select i1 undef, i1 undef, i1 false
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br i1 %Sl46, label %CF84, label %CF85
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CF85: ; preds = %CF84
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%L47 = load i64* %PC
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store i64 %E18, i64* %PC
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%PC52 = bitcast <8 x i32>* %A2 to ppc_fp128*
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store ppc_fp128 0xM4D436562A0416DE00000000000000000, ppc_fp128* %PC52
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%PC59 = bitcast i64* %1 to i8*
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%Cmp61 = icmp slt i64 %L47, %L40
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br i1 %Cmp61, label %CF, label %CF77
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CF77: ; preds = %CF77, %CF85
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br i1 undef, label %CF77, label %CF81
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CF81: ; preds = %CF77
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store i8 %L17, i8* %PC59
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ret void
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}
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