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c9557adb6d
The def operand of the new LG/LD should have the old def operands flags and subreg index. New test: test/CodeGen/SystemZ/fold-memory-op-impl.ll Review: Ulrich Weigand llvm-svn: 298341
130 lines
4.7 KiB
LLVM
130 lines
4.7 KiB
LLVM
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 -verify-machineinstrs | FileCheck %s
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;
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; Test that foldMemoryOperandImpl() doesn't drop subreg / read-undef flags.
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define void @fun_llvm_stress_reduced(i8*, i32*, i64*, i64, i8) {
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; CHECK: .text
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BB:
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%A4 = alloca <4 x i64>
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%A1 = alloca <8 x i1>
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%E6 = extractelement <4 x i1> undef, i32 3
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%L23 = load i8, i8* %0
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%B27 = fmul double 0x59A989483BA7E0C6, undef
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%L30 = load i16, i16* undef
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store i16 -11933, i16* undef
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%L46 = load i16, i16* undef
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%L61 = load i16, i16* undef
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%Sl74 = select i1 undef, i1 undef, i1 true
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br label %CF846
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CF846: ; preds = %CF877, %BB
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%I86 = insertelement <4 x i1> undef, i1 undef, i32 0
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%Cmp89 = icmp ne i64 undef, %3
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%L90 = load i16, i16* undef
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%Shuff92 = shufflevector <4 x i16> zeroinitializer, <4 x i16> zeroinitializer, <4 x i32> <i32 0, i32 2, i32 undef, i32 6>
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br label %CF877
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CF877: ; preds = %CF846
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store i16 %L61, i16* undef
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%Cmp110 = icmp eq i16 %L61, undef
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br i1 %Cmp110, label %CF846, label %CF862
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CF862: ; preds = %CF877
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%I114 = insertelement <4 x i64> zeroinitializer, i64 0, i32 0
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%B115 = shl <4 x i64> zeroinitializer, %I114
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%Sl124 = select i1 true, <8 x i1>* %A1, <8 x i1>* %A1
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%B130 = frem double %B27, 0x59A989483BA7E0C6
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%E143 = extractelement <4 x i64> %B115, i32 1
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%Sl148 = select i1 %Cmp89, <1 x i32> undef, <1 x i32> zeroinitializer
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br label %CF855
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CF855: ; preds = %CF855, %CF862
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%Sl171 = select i1 %Sl74, i1 %E6, i1 undef
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br i1 %Sl171, label %CF855, label %CF874
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CF874: ; preds = %CF855
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%PC186 = bitcast i32* %1 to i16*
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%L196 = load i16, i16* undef
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%B207 = or i8 %4, %L23
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%L211 = load <8 x i1>, <8 x i1>* %Sl124
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%B215 = fdiv double 0x8421A9C0D21F6D3E, %B130
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%L218 = load i16, i16* %PC186
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%Sl223 = select i1 %Sl171, <4 x i1> %I86, <4 x i1> undef
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br label %CF826
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CF826: ; preds = %CF866, %CF910, %CF874
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%B245 = ashr i16 -11933, %L46
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br label %CF910
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CF910: ; preds = %CF826
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%L257 = load i8, i8* %0
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%BC262 = bitcast i64 %E143 to double
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store i16 %L196, i16* %PC186
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%E266 = extractelement <4 x i16> %Shuff92, i32 0
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%Sl271 = select i1 %Cmp89, i1 %Cmp89, i1 %Cmp110
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br i1 %Sl271, label %CF826, label %CF866
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CF866: ; preds = %CF910
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store i64 %E143, i64* %2
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%I276 = insertelement <4 x double> undef, double %BC262, i32 3
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%L281 = load <8 x i1>, <8 x i1>* %Sl124
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%E282 = extractelement <4 x i1> zeroinitializer, i32 2
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br i1 %E282, label %CF826, label %CF848
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CF848: ; preds = %CF866
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%Cmp288 = fcmp olt <4 x double> undef, %I276
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%FC294 = fptosi double undef to i16
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%Cmp296 = icmp ule i16 %FC294, %B245
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store i16 %L218, i16* undef
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store i8 %L23, i8* %0
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%E320 = extractelement <4 x i1> %Sl223, i32 1
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%PC337 = bitcast <8 x i1>* %Sl124 to i1*
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%Cmp345 = icmp uge <1 x i32> undef, %Sl148
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store i16 %L196, i16* %PC186
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br label %CF893
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CF893: ; preds = %CF893, %CF848
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%Cmp361 = fcmp uge float undef, undef
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br i1 %Cmp361, label %CF893, label %CF906
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CF906: ; preds = %CF893
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store i16 -11933, i16* undef
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%Shuff379 = shufflevector <1 x i1> undef, <1 x i1> %Cmp345, <1 x i32> <i32 1>
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br label %CF850
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CF850: ; preds = %CF850, %CF906
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br i1 undef, label %CF850, label %CF925
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CF925: ; preds = %CF850
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store i16 %E266, i16* %PC186
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%Cmp413 = icmp ugt i8 %L257, undef
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store i16 %L30, i16* %PC186
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%Sl420 = select i1 %Sl171, <8 x i1> undef, <8 x i1> %L281
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store i16 %L90, i16* undef
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%FC469 = uitofp i1 %Cmp296 to float
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store i1 %Cmp413, i1* %PC337
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br label %CF833
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CF833: ; preds = %CF833, %CF925
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store i8 %B207, i8* %0
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%E509 = extractelement <8 x i1> %L211, i32 7
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br i1 %E509, label %CF833, label %CF882
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CF882: ; preds = %CF833
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store i1 %Sl271, i1* %PC337
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br label %CF852
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CF852: ; preds = %CF896, %CF882
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store i1 %Sl74, i1* %PC337
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br label %CF896
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CF896: ; preds = %CF852
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%E576 = extractelement <4 x i1> %Cmp288, i32 3
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br i1 %E576, label %CF852, label %CF890
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CF890: ; preds = %CF896
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%Sl581 = select i1 undef, float undef, float %FC469
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unreachable
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}
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