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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 04:02:41 +01:00
llvm-mirror/test/CodeGen
Dan Gohman ac47a4b9ed Enable the new no-SP register classes by default. This is to address
PR4572. A few tests have some minor code regressions due to different
coalescing.

llvm-svn: 78217
2009-08-05 17:40:24 +00:00
..
Alpha Make promotion in operation legalization for SETCC work correctly. 2009-07-17 05:16:04 +00:00
ARM Convert more Neon tests to use FileCheck. 2009-08-04 22:01:41 +00:00
Blackfin Turn some insert_subreg, extract_subreg, subreg_to_reg into implicit_defs. 2009-08-05 03:53:14 +00:00
CBackend Fix an erroneous check for isFNeg; the FNeg case is handled 2009-06-04 23:43:29 +00:00
CellSPU Add some generic expansion logic for SMULO and UMULO. Fixes UMULO 2009-06-16 06:58:29 +00:00
CPP
Generic Remove the IA-64 backend. 2009-07-24 00:30:09 +00:00
Mips Pass target triple string in to TargetMachine constructor. 2009-08-03 04:03:51 +00:00
MSP430
PIC16 Fix a bug in the PIC16 backend. 2009-08-05 16:46:43 +00:00
PowerPC Revert r75663 (and r76805), as it is causing regressions on powerpc. 2009-07-23 00:09:46 +00:00
SPARC
SystemZ Add testcases for reg-mem arithemtics added recently 2009-08-05 17:04:32 +00:00
Thumb tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have. 2009-07-28 07:38:35 +00:00
Thumb2 Disable stack coloring with register for now. It's not able to set kill markers. 2009-08-05 07:26:17 +00:00
X86 Enable the new no-SP register classes by default. This is to address 2009-08-05 17:40:24 +00:00
XCore Add extra SEXT pattern. 2009-08-02 22:45:24 +00:00