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llvm-mirror/test/CodeGen/SystemZ/memchr-01.ll
Jonas Paulsson ee6ca71f38 [SystemZ] Make the CCRegs regclass non-allocatable.
This was discovered to be necessary while running memchr-01.ll with
-verify-machinstrs, because it is not allowed to have a phys reg live
accross block boundaries while on SSA form, if the register is
allocatable (expect in entry block and landing pads).

In this test case, stringRRE pseudos are expanded after isel by adding
a loop block which produces a live out CC register. To make the test
pass, it was also necessary to not say that StringRRELoop pseudo uses
R0L, this is only true for the StringRRE opcode.

-verify-machineinstrs added to memchr-01.ll test.

New test case int-cmp-51.ll to test that MachineCSE can eliminate
an identical compare (which it couldn't do before).

Reviewed by Ulrich Weigand

llvm-svn: 251634
2015-10-29 16:13:55 +00:00

22 lines
602 B
LLVM

; Test memchr using SRST, with a weird but usable prototype.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu -verify-machineinstrs | FileCheck %s
declare i8 *@memchr(i8 *%src, i16 %char, i32 %len)
; Test a simple forwarded call.
define i8 *@f1(i8 *%src, i16 %char, i32 %len) {
; CHECK-LABEL: f1:
; CHECK-DAG: lgr [[REG:%r[1-5]]], %r2
; CHECK-DAG: algfr %r2, %r4
; CHECK-DAG: llcr %r0, %r3
; CHECK: [[LABEL:\.[^:]*]]:
; CHECK: srst %r2, [[REG]]
; CHECK-NEXT: jo [[LABEL]]
; CHECK: jl {{\.L.*}}
; CHECK: lghi %r2, 0
; CHECK: br %r14
%res = call i8 *@memchr(i8 *%src, i16 %char, i32 %len)
ret i8 *%res
}