Igor Breger bfb07ae48a AVX512 : Implemented encoding and DAG lowering for VMOVHPS/PD and VMOVLPS/PD instructions. ... Differential Revision: http://reviews.llvm.org/D14492 llvm-svn: 252592		2015-11-10 07:09:07 +00:00
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AArch64	[AArch64] Check the size of the vector before accessing its elements.	2015-10-13 18:55:34 +00:00
AMDGPU	AMDGPU/SI: Emit HSA kernels with symbol type STT_AMDGPU_HSA_KERNEL	2015-11-06 11:45:14 +00:00
ARM	DI: Reverse direction of subprogram -> function edge.	2015-11-05 22:03:56 +00:00
AsmParser	Simplify .org processing and make it a bit more powerful.	2015-11-04 23:50:29 +00:00
COFF	Fix pr24486.	2015-10-05 12:07:05 +00:00
Disassembler	[Hexagon] Fixing store instructions and reenabling a few more tests.	2015-11-10 00:22:00 +00:00
ELF	Use SHT_X86_64_UNWIND on every OS.	2015-11-06 13:35:35 +00:00
Hexagon	[Hexagon] Adding instruction aliases and tests.	2015-11-10 01:58:26 +00:00
MachO	MachO: support tvOS and watchOS version min commands in llvm-objdump	2015-11-02 21:26:58 +00:00
Markup
Mips	[mips][ias] Range check uimm4 operands and fixed a bug this revealed.	2015-11-06 12:41:43 +00:00
PowerPC	Relax a few more overspecified tests.	2015-11-03 19:38:19 +00:00
Sparc	Update test to take into account for r251271.	2015-10-26 03:34:29 +00:00
SystemZ	[SystemZ] testcase MC/SystemZ/insn-good-z13.s extended.	2015-10-12 10:13:57 +00:00
X86	AVX512 : Implemented encoding and DAG lowering for VMOVHPS/PD and VMOVLPS/PD instructions.	2015-11-10 07:09:07 +00:00