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dbc82e3483
Do (shl (add x, c1), c2) -> (add (shl x, c2), c1 << c2) This is already done for multiplies, but since multiplies by powers of two are turned into shifts, we also need to handle it here. This might want checks for isLegalAddImmediate to avoid transforming an add of a legal immediate with one that isn't. llvm-svn: 217610
91 lines
3.3 KiB
LLVM
91 lines
3.3 KiB
LLVM
; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
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declare i32 @llvm.r600.read.tidig.x() #1
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; Test with inline immediate
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; FUNC-LABEL: @shl_2_add_9_i32
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; SI: V_LSHLREV_B32_e32 [[REG:v[0-9]+]], 2, {{v[0-9]+}}
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; SI: V_ADD_I32_e32 [[RESULT:v[0-9]+]], 36, [[REG]]
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; SI: BUFFER_STORE_DWORD [[RESULT]]
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; SI: S_ENDPGM
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define void @shl_2_add_9_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
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%tid.x = tail call i32 @llvm.r600.read.tidig.x() #1
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%ptr = getelementptr i32 addrspace(1)* %in, i32 %tid.x
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%val = load i32 addrspace(1)* %ptr, align 4
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%add = add i32 %val, 9
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%result = shl i32 %add, 2
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @shl_2_add_9_i32_2_add_uses
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; SI-DAG: V_ADD_I32_e32 [[ADDREG:v[0-9]+]], 9, {{v[0-9]+}}
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; SI-DAG: V_LSHLREV_B32_e32 [[SHLREG:v[0-9]+]], 2, {{v[0-9]+}}
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; SI-DAG: BUFFER_STORE_DWORD [[ADDREG]]
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; SI-DAG: BUFFER_STORE_DWORD [[SHLREG]]
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; SI: S_ENDPGM
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define void @shl_2_add_9_i32_2_add_uses(i32 addrspace(1)* %out0, i32 addrspace(1)* %out1, i32 addrspace(1)* %in) #0 {
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%tid.x = tail call i32 @llvm.r600.read.tidig.x() #1
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%ptr = getelementptr i32 addrspace(1)* %in, i32 %tid.x
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%val = load i32 addrspace(1)* %ptr, align 4
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%add = add i32 %val, 9
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%result = shl i32 %add, 2
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store i32 %result, i32 addrspace(1)* %out0, align 4
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store i32 %add, i32 addrspace(1)* %out1, align 4
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ret void
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}
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; Test with add literal constant
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; FUNC-LABEL: @shl_2_add_999_i32
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; SI: V_LSHLREV_B32_e32 [[REG:v[0-9]+]], 2, {{v[0-9]+}}
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; SI: V_ADD_I32_e32 [[RESULT:v[0-9]+]], 0xf9c, [[REG]]
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; SI: BUFFER_STORE_DWORD [[RESULT]]
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; SI: S_ENDPGM
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define void @shl_2_add_999_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
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%tid.x = tail call i32 @llvm.r600.read.tidig.x() #1
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%ptr = getelementptr i32 addrspace(1)* %in, i32 %tid.x
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%val = load i32 addrspace(1)* %ptr, align 4
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%shl = add i32 %val, 999
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%result = shl i32 %shl, 2
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @test_add_shl_add_constant
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; SI-DAG: S_LOAD_DWORD [[X:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
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; SI-DAG: S_LOAD_DWORD [[Y:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
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; SI: S_LSHL_B32 [[SHL3:s[0-9]+]], [[X]], 3
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; SI: S_ADD_I32 [[TMP:s[0-9]+]], [[SHL3]], [[Y]]
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; SI: S_ADD_I32 [[RESULT:s[0-9]+]], [[TMP]], 0x3d8
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; SI: V_MOV_B32_e32 [[VRESULT:v[0-9]+]], [[RESULT]]
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; SI: BUFFER_STORE_DWORD [[VRESULT]]
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define void @test_add_shl_add_constant(i32 addrspace(1)* %out, i32 %x, i32 %y) #0 {
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%add.0 = add i32 %x, 123
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%shl = shl i32 %add.0, 3
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%add.1 = add i32 %shl, %y
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store i32 %add.1, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @test_add_shl_add_constant_inv
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; SI-DAG: S_LOAD_DWORD [[X:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
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; SI-DAG: S_LOAD_DWORD [[Y:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
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; SI: S_LSHL_B32 [[SHL3:s[0-9]+]], [[X]], 3
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; SI: S_ADD_I32 [[TMP:s[0-9]+]], [[SHL3]], [[Y]]
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; SI: S_ADD_I32 [[RESULT:s[0-9]+]], [[TMP]], 0x3d8
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; SI: V_MOV_B32_e32 [[VRESULT:v[0-9]+]], [[RESULT]]
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; SI: BUFFER_STORE_DWORD [[VRESULT]]
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define void @test_add_shl_add_constant_inv(i32 addrspace(1)* %out, i32 %x, i32 %y) #0 {
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%add.0 = add i32 %x, 123
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%shl = shl i32 %add.0, 3
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%add.1 = add i32 %y, %shl
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store i32 %add.1, i32 addrspace(1)* %out, align 4
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ret void
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}
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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