mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-24 03:33:20 +01:00
f2e33e8135
As a first step towards real little-endian code generation, this patch changes the PowerPC MC layer to actually generate little-endian object files. This involves passing the little-endian flag through the various layers, including down to createELFObjectWriter so we actually get basic little-endian ELF objects, emitting instructions in little-endian order, and handling fixups and relocations as appropriate for little-endian. The bulk of the patch is to update most test cases in test/MC/PowerPC to verify both big- and little-endian encodings. (The only test cases *not* updated are those that create actual big-endian ABI code, like the TLS tests.) Note that while the object files are now little-endian, the generated code itself is not yet updated, in particular, it still does not adhere to the ELFv2 ABI. llvm-svn: 204634
104 lines
2.6 KiB
ArmAsm
104 lines
2.6 KiB
ArmAsm
|
|
# RUN: not llvm-mc -triple powerpc64-unknown-unknown < %s 2> %t
|
|
# RUN: FileCheck < %t %s
|
|
# RUN: not llvm-mc -triple powerpc64le-unknown-unknown < %s 2> %t
|
|
# RUN: FileCheck < %t %s
|
|
|
|
# Register operands
|
|
|
|
# CHECK: error: invalid operand for instruction
|
|
# CHECK-NEXT: add 32, 32, 32
|
|
add 32, 32, 32
|
|
|
|
# CHECK: error: invalid register name
|
|
# CHECK-NEXT: add %r32, %r32, %r32
|
|
add %r32, %r32, %r32
|
|
|
|
# TLS register operands
|
|
|
|
# CHECK: error: invalid operand for instruction
|
|
# CHECK-NEXT: add 3, symbol@tls, 4
|
|
add 3, symbol@tls, 4
|
|
|
|
# CHECK: error: invalid operand for instruction
|
|
# CHECK-NEXT: subf 3, 4, symbol@tls
|
|
subf 3, 4, symbol@tls
|
|
|
|
# Signed 16-bit immediate operands
|
|
|
|
# CHECK: error: invalid operand for instruction
|
|
# CHECK-NEXT: addi 1, 0, -32769
|
|
addi 1, 0, -32769
|
|
|
|
# CHECK: error: invalid operand for instruction
|
|
# CHECK-NEXT: addi 1, 0, 32768
|
|
addi 1, 0, 32768
|
|
|
|
# Unsigned 16-bit immediate operands
|
|
|
|
# CHECK: error: invalid operand for instruction
|
|
# CHECK-NEXT: ori 1, 2, -1
|
|
ori 1, 2, -1
|
|
|
|
# CHECK: error: invalid operand for instruction
|
|
# CHECK-NEXT: ori 1, 2, 65536
|
|
ori 1, 2, 65536
|
|
|
|
# Signed 16-bit immediate operands (extended range for addis)
|
|
|
|
# CHECK: error: invalid operand for instruction
|
|
addis 1, 0, -65537
|
|
|
|
# CHECK: error: invalid operand for instruction
|
|
addis 1, 0, 65536
|
|
|
|
# D-Form memory operands
|
|
|
|
# CHECK: error: invalid register number
|
|
# CHECK-NEXT: lwz 1, 0(32)
|
|
lwz 1, 0(32)
|
|
|
|
# CHECK: error: invalid register name
|
|
# CHECK-NEXT: lwz 1, 0(%r32)
|
|
lwz 1, 0(%r32)
|
|
|
|
# CHECK: error: invalid operand for instruction
|
|
# CHECK-NEXT: lwz 1, -32769(2)
|
|
lwz 1, -32769(2)
|
|
|
|
# CHECK: error: invalid operand for instruction
|
|
# CHECK-NEXT: lwz 1, 32768(2)
|
|
lwz 1, 32768(2)
|
|
|
|
# CHECK: error: invalid register number
|
|
# CHECK-NEXT: ld 1, 0(32)
|
|
ld 1, 0(32)
|
|
|
|
# CHECK: error: invalid register name
|
|
# CHECK-NEXT: ld 1, 0(%r32)
|
|
ld 1, 0(%r32)
|
|
|
|
# CHECK: error: invalid operand for instruction
|
|
# CHECK-NEXT: ld 1, 1(2)
|
|
ld 1, 1(2)
|
|
|
|
# CHECK: error: invalid operand for instruction
|
|
# CHECK-NEXT: ld 1, 2(2)
|
|
ld 1, 2(2)
|
|
|
|
# CHECK: error: invalid operand for instruction
|
|
# CHECK-NEXT: ld 1, 3(2)
|
|
ld 1, 3(2)
|
|
|
|
# CHECK: error: invalid operand for instruction
|
|
# CHECK-NEXT: ld 1, -32772(2)
|
|
ld 1, -32772(2)
|
|
|
|
# CHECK: error: invalid operand for instruction
|
|
# CHECK-NEXT: ld 1, 32768(2)
|
|
ld 1, 32768(2)
|
|
|
|
# CHECK: error: invalid modifier 'got' (no symbols present)
|
|
addi 4, 3, 123@got
|
|
# CHECK-NEXT: addi 4, 3, 123@got
|