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2f13163a84
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. llvm-svn: 205090
73 lines
1.9 KiB
LLVM
73 lines
1.9 KiB
LLVM
; RUN: llc -march=arm64 < %s | FileCheck %s
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; rdar://10232252
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@object = external hidden global i64, section "__DATA, __objc_ivar", align 8
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; base + offset (imm9)
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; CHECK: @t1
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; CHECK: ldr xzr, [x{{[0-9]+}}, #8]
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; CHECK: ret
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define void @t1() {
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%incdec.ptr = getelementptr inbounds i64* @object, i64 1
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%tmp = load volatile i64* %incdec.ptr, align 8
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ret void
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}
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; base + offset (> imm9)
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; CHECK: @t2
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; CHECK: sub [[ADDREG:x[0-9]+]], x{{[0-9]+}}, #264
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; CHECK: ldr xzr, [
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; CHECK: [[ADDREG]]]
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; CHECK: ret
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define void @t2() {
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%incdec.ptr = getelementptr inbounds i64* @object, i64 -33
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%tmp = load volatile i64* %incdec.ptr, align 8
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ret void
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}
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; base + unsigned offset (> imm9 and <= imm12 * size of type in bytes)
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; CHECK: @t3
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; CHECK: ldr xzr, [x{{[0-9]+}}, #32760]
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; CHECK: ret
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define void @t3() {
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%incdec.ptr = getelementptr inbounds i64* @object, i64 4095
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%tmp = load volatile i64* %incdec.ptr, align 8
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ret void
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}
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; base + unsigned offset (> imm12 * size of type in bytes)
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; CHECK: @t4
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; CHECK: add [[ADDREG:x[0-9]+]], x{{[0-9]+}}, #32768
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; CHECK: ldr xzr, [
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; CHECK: [[ADDREG]]]
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; CHECK: ret
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define void @t4() {
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%incdec.ptr = getelementptr inbounds i64* @object, i64 4096
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%tmp = load volatile i64* %incdec.ptr, align 8
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ret void
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}
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; base + reg
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; CHECK: @t5
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; CHECK: ldr xzr, [x{{[0-9]+}}, x{{[0-9]+}}, lsl #3]
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; CHECK: ret
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define void @t5(i64 %a) {
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%incdec.ptr = getelementptr inbounds i64* @object, i64 %a
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%tmp = load volatile i64* %incdec.ptr, align 8
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ret void
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}
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; base + reg + imm
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; CHECK: @t6
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; CHECK: add [[ADDREG:x[0-9]+]], x{{[0-9]+}}, x{{[0-9]+}}, lsl #3
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; CHECK-NEXT: add [[ADDREG]], [[ADDREG]], #32768
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; CHECK: ldr xzr, [
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; CHECK: [[ADDREG]]]
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; CHECK: ret
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define void @t6(i64 %a) {
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%tmp1 = getelementptr inbounds i64* @object, i64 %a
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%incdec.ptr = getelementptr inbounds i64* %tmp1, i64 4096
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%tmp = load volatile i64* %incdec.ptr, align 8
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ret void
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}
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