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https://github.com/RPCS3/llvm-mirror.git
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2f13163a84
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. llvm-svn: 205090
48 lines
1.5 KiB
LLVM
48 lines
1.5 KiB
LLVM
; RUN: llc -mtriple=arm64-apple-ios -O2 -arm64-collect-loh -arm64-collect-loh-bb-only=false < %s -o - | FileCheck %s
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@a = internal unnamed_addr global i32 0, align 4
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@b = external global i32
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; Function Attrs: noinline nounwind ssp
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define void @foo(i32 %t) {
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entry:
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%tmp = load i32* @a, align 4
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%add = add nsw i32 %tmp, %t
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store i32 %add, i32* @a, align 4
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ret void
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}
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; Function Attrs: nounwind ssp
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; Testcase for <rdar://problem/15438605>, AdrpAdrp reuse is valid only when the first adrp
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; dominates the second.
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; The first adrp comes from the loading of 'a' and the second the loading of 'b'.
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; 'a' is loaded in if.then, 'b' in if.end4, if.then does not dominates if.end4.
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; CHECK-LABEL: _test
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; CHECK: ret
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; CHECK-NOT: .loh AdrpAdrp
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define i32 @test(i32 %t) {
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entry:
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%cmp = icmp sgt i32 %t, 5
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br i1 %cmp, label %if.then, label %if.end4
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if.then: ; preds = %entry
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%tmp = load i32* @a, align 4
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%add = add nsw i32 %tmp, %t
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%cmp1 = icmp sgt i32 %add, 12
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br i1 %cmp1, label %if.then2, label %if.end4
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if.then2: ; preds = %if.then
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tail call void @foo(i32 %add)
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%tmp1 = load i32* @a, align 4
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br label %if.end4
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if.end4: ; preds = %if.then2, %if.then, %entry
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%t.addr.0 = phi i32 [ %tmp1, %if.then2 ], [ %t, %if.then ], [ %t, %entry ]
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%tmp2 = load i32* @b, align 4
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%add5 = add nsw i32 %tmp2, %t.addr.0
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tail call void @foo(i32 %add5)
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%tmp3 = load i32* @b, align 4
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%add6 = add nsw i32 %tmp3, %t.addr.0
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ret i32 %add6
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}
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