Craig Topper ad1b2fd4c0 [X86] Enable -x86-experimental-vector-widening-legalization by default. ... This patch changes our defualt legalization behavior for 16, 32, and 64 bit vectors with i8/i16/i32/i64 scalar types from promotion to widening. For example, v8i8 will now be widened to v16i8 instead of promoted to v8i16. This keeps the elements widths the same and pads with undef elements. We believe this is a better legalization strategy. But it carries some issues due to the fragmented vector ISA. For example, i8 shifts and multiplies get widened and then later have to be promoted/split into vXi16 vectors. This has the potential to cause regressions so we wanted to get it in early in the 10.0 cycle so we have plenty of time to address them. Next steps will be to merge tests that explicitly test the command line option. And then we can remove the option and its associated code. llvm-svn: 367901		2019-08-05 18:25:36 +00:00
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AArch64	Improve reduction intrinsics by overloading result value.	2019-06-13 09:37:38 +00:00
AMDGPU	TTI: Improve default costs for addrspacecast	2019-06-03 18:41:34 +00:00
ARM	[lit] Delete empty lines at the end of lit.local.cfg NFC	2019-06-17 09:51:07 +00:00
PowerPC	Revert Recommit [PowerPC] Update P9 vector costs for insert/extract element	2019-07-01 23:29:46 +00:00
RISCV	[lit] Delete empty lines at the end of lit.local.cfg NFC	2019-06-17 09:51:07 +00:00
SystemZ	[SystemZ] Add support for new cpu architecture - arch13	2019-07-12 18:13:16 +00:00
X86	[X86] Enable -x86-experimental-vector-widening-legalization by default.	2019-08-05 18:25:36 +00:00
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