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ce0f9aef12
The fast register allocator is not supposed to work in the optimizing pipeline. It doesn't make sense to compute live intervals, run full copy coalescing, and then run RAFast. Fast register allocation in the optimizing pipeline is better done by RABasic. llvm-svn: 158242
31 lines
1.4 KiB
LLVM
31 lines
1.4 KiB
LLVM
; RUN: llc < %s -march=x86 | FileCheck %s
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; RUN: llc < %s -march=x86 -regalloc=fast -optimize-regalloc=0 | FileCheck %s
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; %0 must not be put in EAX or EDX.
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; In the first asm, $0 and $2 must not be put in EAX.
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; CHECK: InlineAsm Start
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; CHECK-NOT: movl %eax, %eax
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; CHECK-NOT: movl (%eax), %eax
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; CHECK: InlineAsm End
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; In the second asm, $0 and $2 must not be put in EDX.
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; CHECK: InlineAsm Start
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; CHECK-NOT: movl %edx, %edx
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; CHECK-NOT: movl (%edx), %edx
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; CHECK: InlineAsm End
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
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target triple = "i386-apple-darwin8"
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@x = common global i32 0
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define i32 @aci(i32* %pw) nounwind {
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entry:
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%0 = load i32* @x, align 4
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%asmtmp = tail call { i32, i32 } asm "movl $0, %eax\0A\090:\0A\09test %eax, %eax\0A\09je 1f\0A\09movl %eax, $2\0A\09incl $2\0A\09lock\0A\09cmpxchgl $2, $0\0A\09jne 0b\0A\091:", "=*m,=&{ax},=&r,*m,~{dirflag},~{fpsr},~{flags},~{memory},~{cc}"(i32* %pw, i32* %pw) nounwind
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%asmtmp2 = tail call { i32, i32 } asm "movl $0, %edx\0A\090:\0A\09test %edx, %edx\0A\09je 1f\0A\09movl %edx, $2\0A\09incl $2\0A\09lock\0A\09cmpxchgl $2, $0\0A\09jne 0b\0A\091:", "=*m,=&{dx},=&r,*m,~{dirflag},~{fpsr},~{flags},~{memory},~{cc}"(i32* %pw, i32* %pw) nounwind
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%asmresult2 = extractvalue { i32, i32 } %asmtmp, 0
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%asmresult3 = extractvalue { i32, i32 } %asmtmp2, 0
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%1 = add i32 %asmresult2, %asmresult3
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%2 = add i32 %0, %1
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ret i32 %2
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}
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