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d09b64fc25
Adds an instruction itinerary to all x86 instructions, giving each a default latency of 1, using the InstrItinClass IIC_DEFAULT. Sets specific latencies for Atom for the instructions in files X86InstrCMovSetCC.td, X86InstrArithmetic.td, X86InstrControl.td, and X86InstrShiftRotate.td. The Atom latencies for the remainder of the x86 instructions will be set in subsequent patches. Adds a test to verify that the scheduler is working. Also changes the scheduling preference to "Hybrid" for i386 Atom, while leaving x86_64 as ILP. Patch by Preston Gurd! llvm-svn: 149558
11 lines
318 B
LLVM
11 lines
318 B
LLVM
; RUN: llc -mcpu=generic -mtriple=x86_64-mingw32 < %s | FileCheck %s
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; CHECK: subq $40, %rsp
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; CHECK: movaps %xmm8, (%rsp)
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; CHECK: movaps %xmm7, 16(%rsp)
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define i32 @a() nounwind {
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entry:
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tail call void asm sideeffect "", "~{xmm7},~{xmm8},~{dirflag},~{fpsr},~{flags}"() nounwind
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ret i32 undef
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}
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