Andrea Di Biagio ad80113e58 [MCA][InstrBuilder] Check for the presence of flag VariadicOpsAreDefs. ... This patch fixes the logic that checks for variadic register definitions, Before llvm-svn 348114 (commit 4cf35b4ab0b), it was not possible to explicitly mark variadic operands as definitions. By default, variadic operands of an MCInst were always assumed to be uses. A number of had-hoc checks were introduced in the InstrBuilder to fix the processing of variadic register operands of ARM ldm/stm variants. This patch simply replaces those old (and buggy) checks with a much simpler (and correct) check for MCID::Flag::VariadicOpsAreDefs.		2021-06-15 09:52:38 +01:00
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HardwareUnits	[MCA] Refactor the InOrderIssueStage stage. NFCI	2021-05-27 22:28:04 +01:00
Stages	[MCA] Minor changes to the InOrderIssueStage. NFC	2021-05-28 00:33:59 +01:00
CMakeLists.txt	[MCA] Add support for in-order CPUs	2021-03-04 14:08:19 +03:00
CodeEmitter.cpp	[MCA][NFCI] Minor changes to InstrBuilder and Instruction.	2021-05-31 17:05:13 +01:00
Context.cpp	[MCA][NFCI] Minor changes to InstrBuilder and Instruction.	2021-05-31 17:05:13 +01:00
HWEventListener.cpp
InstrBuilder.cpp	[MCA][InstrBuilder] Check for the presence of flag VariadicOpsAreDefs.	2021-06-15 09:52:38 +01:00
Instruction.cpp	[MCA] Improved handling of negative read-advance cycles.	2021-03-23 14:47:23 +00:00
Pipeline.cpp	Revert "Remove redundant "std::move"s in return statements"	2020-02-10 07:07:40 -08:00
Support.cpp