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to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
88 lines
2.9 KiB
C++
88 lines
2.9 KiB
C++
//===- ARCTargetMachine.cpp - Define TargetMachine for ARC ------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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//
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//===----------------------------------------------------------------------===//
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#include "ARCTargetMachine.h"
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#include "ARC.h"
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#include "ARCTargetTransformInfo.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
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#include "llvm/CodeGen/TargetPassConfig.h"
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#include "llvm/Support/TargetRegistry.h"
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using namespace llvm;
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static Reloc::Model getRelocModel(Optional<Reloc::Model> RM) {
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if (!RM.hasValue())
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return Reloc::Static;
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return *RM;
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}
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/// ARCTargetMachine ctor - Create an ILP32 architecture model
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ARCTargetMachine::ARCTargetMachine(const Target &T, const Triple &TT,
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StringRef CPU, StringRef FS,
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const TargetOptions &Options,
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Optional<Reloc::Model> RM,
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Optional<CodeModel::Model> CM,
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CodeGenOpt::Level OL, bool JIT)
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: LLVMTargetMachine(T,
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"e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
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"f32:32:32-i64:32-f64:32-a:0:32-n32",
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TT, CPU, FS, Options, getRelocModel(RM),
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getEffectiveCodeModel(CM, CodeModel::Small), OL),
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TLOF(make_unique<TargetLoweringObjectFileELF>()),
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Subtarget(TT, CPU, FS, *this) {
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initAsmInfo();
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}
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ARCTargetMachine::~ARCTargetMachine() = default;
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namespace {
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/// ARC Code Generator Pass Configuration Options.
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class ARCPassConfig : public TargetPassConfig {
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public:
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ARCPassConfig(ARCTargetMachine &TM, PassManagerBase &PM)
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: TargetPassConfig(TM, PM) {}
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ARCTargetMachine &getARCTargetMachine() const {
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return getTM<ARCTargetMachine>();
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}
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bool addInstSelector() override;
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void addPreEmitPass() override;
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void addPreRegAlloc() override;
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};
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} // end anonymous namespace
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TargetPassConfig *ARCTargetMachine::createPassConfig(PassManagerBase &PM) {
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return new ARCPassConfig(*this, PM);
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}
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bool ARCPassConfig::addInstSelector() {
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addPass(createARCISelDag(getARCTargetMachine(), getOptLevel()));
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return false;
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}
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void ARCPassConfig::addPreEmitPass() { addPass(createARCBranchFinalizePass()); }
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void ARCPassConfig::addPreRegAlloc() { addPass(createARCExpandPseudosPass()); }
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// Force static initialization.
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extern "C" void LLVMInitializeARCTarget() {
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RegisterTargetMachine<ARCTargetMachine> X(getTheARCTarget());
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}
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TargetTransformInfo
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ARCTargetMachine::getTargetTransformInfo(const Function &F) {
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return TargetTransformInfo(ARCTTIImpl(this, F));
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}
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