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to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
78 lines
2.5 KiB
C++
78 lines
2.5 KiB
C++
//===- HexagonBitTracker.h --------------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONBITTRACKER_H
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#define LLVM_LIB_TARGET_HEXAGON_HEXAGONBITTRACKER_H
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#include "BitTracker.h"
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#include "llvm/ADT/DenseMap.h"
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#include <cstdint>
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namespace llvm {
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class HexagonInstrInfo;
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class HexagonRegisterInfo;
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class MachineFrameInfo;
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class MachineFunction;
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class MachineInstr;
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class MachineRegisterInfo;
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struct HexagonEvaluator : public BitTracker::MachineEvaluator {
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using CellMapType = BitTracker::CellMapType;
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using RegisterRef = BitTracker::RegisterRef;
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using RegisterCell = BitTracker::RegisterCell;
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using BranchTargetList = BitTracker::BranchTargetList;
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HexagonEvaluator(const HexagonRegisterInfo &tri, MachineRegisterInfo &mri,
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const HexagonInstrInfo &tii, MachineFunction &mf);
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bool evaluate(const MachineInstr &MI, const CellMapType &Inputs,
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CellMapType &Outputs) const override;
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bool evaluate(const MachineInstr &BI, const CellMapType &Inputs,
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BranchTargetList &Targets, bool &FallsThru) const override;
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BitTracker::BitMask mask(unsigned Reg, unsigned Sub) const override;
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uint16_t getPhysRegBitWidth(unsigned Reg) const override;
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const TargetRegisterClass &composeWithSubRegIndex(
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const TargetRegisterClass &RC, unsigned Idx) const override;
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MachineFunction &MF;
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MachineFrameInfo &MFI;
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const HexagonInstrInfo &TII;
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private:
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unsigned getUniqueDefVReg(const MachineInstr &MI) const;
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bool evaluateLoad(const MachineInstr &MI, const CellMapType &Inputs,
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CellMapType &Outputs) const;
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bool evaluateFormalCopy(const MachineInstr &MI, const CellMapType &Inputs,
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CellMapType &Outputs) const;
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unsigned getNextPhysReg(unsigned PReg, unsigned Width) const;
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unsigned getVirtRegFor(unsigned PReg) const;
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// Type of formal parameter extension.
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struct ExtType {
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enum { SExt, ZExt };
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ExtType() = default;
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ExtType(char t, uint16_t w) : Type(t), Width(w) {}
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char Type = 0;
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uint16_t Width = 0;
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};
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// Map VR -> extension type.
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using RegExtMap = DenseMap<unsigned, ExtType>;
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RegExtMap VRX;
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONBITTRACKER_H
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