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46d19bc0c7
If the arch is P8, we will select XFLOAD to load the floating point, and then, expand it to vsx and non-vsx X-form instruction post RA. This patch is trying to convert the X-form to D-form if it meets the requirement that one operand of the x-form inst is the special Zero register, and another operand fed by add inst. i.e. y = add imm, reg LFDX. 0, y --> LFD imm(reg) Reviewers: Nemanjai Differential Revision: https://reviews.llvm.org/D49007 llvm-svn: 340149
29 lines
1.4 KiB
LLVM
29 lines
1.4 KiB
LLVM
; RUN: llc < %s -O0 -fast-isel -mattr=+vsx -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -ppc-late-peephole=false | FileCheck %s --check-prefix=ELF64VSX
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;; The semantics of VSX stores for when R0 is used is different depending on
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;; whether it is used as base or offset. If used as base, the effective
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;; address computation will use zero regardless of the content of R0. If used as
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;; an offset the content will be used in the effective address. We observed that
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;; for some constructors, the initialization values were being stored without
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;; an offset register being specified which was causing R0 to be used as offset
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;; in regions where it contained the value in the link register. This test
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;; verifies that R0 is used as base in these situations.
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%SomeStruct = type { double }
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; ELF64VSX-LABEL: SomeStructCtor
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define linkonce_odr void @SomeStructCtor(%SomeStruct* %this, double %V) unnamed_addr align 2 {
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entry:
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%this.addr = alloca %SomeStruct*, align 8
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%V.addr = alloca double, align 8
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store %SomeStruct* %this, %SomeStruct** %this.addr, align 8
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; ELF64VSX: stfdx {{[0-9][0-9]?}}, 0, {{[1-9][0-9]?}}
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store double %V, double* %V.addr, align 8
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%this1 = load %SomeStruct*, %SomeStruct** %this.addr
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%Val = getelementptr inbounds %SomeStruct, %SomeStruct* %this1, i32 0, i32 0
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; ELF64VSX: stxsdx {{[0-9][0-9]?}}, 0, {{[1-9][0-9]?}}
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%0 = load double, double* %V.addr, align 8
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store double %0, double* %Val, align 8
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ret void
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}
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