..
SVE
[AArch64][SVE] Re-submit patch series for ZIP1/ZIP2
2017-12-20 11:02:42 +00:00
adrp-relocation.s
[AArch64] Update a comment in a test
2017-07-25 19:57:26 +00:00
alias-addsubimm.s
alias-logicalimm.s
arm32-elf-relocs.s
[AArch64] ILP32 Backend Relocation Support
2017-05-02 22:01:48 +00:00
arm64-adr.s
arm64-advsimd.s
[AArch64][TableGen] Skip tied result operands for InstAlias
2017-11-20 14:36:40 +00:00
arm64-aliases.s
arm64-arithmetic-encoding.s
arm64-arm64-fixup.s
arm64-basic-a64-instructions.s
arm64-be-datalayout.s
arm64-bitfield-encoding.s
arm64-branch-encoding.s
arm64-condbr-without-dots.s
arm64-crypto.s
[AArch64] Tie source and destination operands for AESMC/AESIMC.
2017-07-29 20:35:28 +00:00
arm64-diagno-predicate.s
arm64-diags.s
Re-commit: [TableGen] AsmMatcher: Fix bug with reported diagnostic for operand.
2017-12-14 16:09:48 +00:00
arm64-directive_loh.s
arm64-elf-reloc-condbr.s
[AArch64] ILP32 Backend Relocation Support
2017-05-02 22:01:48 +00:00
arm64-elf-relocs.s
[AArch64] ILP32 Backend Relocation Support
2017-05-02 22:01:48 +00:00
arm64-fp-encoding-error.s
arm64-fp-encoding.s
arm64-ilp32.s
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
arm64-large-relocs.s
arm64-leaf-compact-unwind.s
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
arm64-logical-encoding.s
arm64-mapping-across-sections.s
arm64-mapping-within-section.s
arm64-memory.s
arm64-nv-cond.s
arm64-optional-hash.s
arm64-separator.s
arm64-simd-ldst.s
arm64-small-data-fixups.s
arm64-spsel-sysreg.s
arm64-system-encoding.s
[AArch64] CCSIDR2 system register
2017-12-20 08:56:41 +00:00
arm64-target-specific-sysreg.s
arm64-tls-modifiers-darwin.s
arm64-tls-relocs.s
[AArch64] ILP32 Backend Relocation Support
2017-05-02 22:01:48 +00:00
arm64-v128_lo-diagnostics.s
arm64-variable-exprs.s
arm64-vector-lists.s
arm64-verbose-vector-case.s
arm64v8.1-diagno-predicate.s
armv8.1a-atomic.s
armv8.1a-lor.s
armv8.1a-lse.s
[AArch64] Add V8_2aOps feature to Cortex-A55 and 75
2017-09-18 14:46:14 +00:00
armv8.1a-pan.s
armv8.1a-rdma.s
armv8.1a-vhe.s
armv8.2a-at.s
armv8.2a-dotprod-errors.s
[AArch64] Assembler support for the ARMv8.2a dot product instructions
2017-08-09 14:59:54 +00:00
armv8.2a-dotprod.s
[ARM][AArch64] Cortex-A75 and Cortex-A55 support
2017-08-21 08:43:06 +00:00
armv8.2a-mmfr2.s
armv8.2a-persistent-memory.s
armv8.2a-statistical-profiling.s
[AArch64][SVE] Re-submit patch series for ZIP1/ZIP2
2017-12-20 11:02:42 +00:00
armv8.2a-uao.s
armv8.3a-complex.s
[AArch64][SVE] Re-submit patch series for ZIP1/ZIP2
2017-12-20 11:02:42 +00:00
armv8.3a-diagnostics.s
[AArch64] Enable ARMv8.3-A pointer authentication
2017-08-11 13:14:00 +00:00
armv8.3a-ID_ISAR6_EL1.s
[AArch64] IDSAR6 register assembler support
2017-08-31 08:36:45 +00:00
armv8.3a-js.s
[ARM][AArch64] v8.3-A Javascript Conversion
2017-08-22 11:08:21 +00:00
armv8.3a-rcpc.s
[AArch64][SVE] Re-submit patch series for ZIP1/ZIP2
2017-12-20 11:02:42 +00:00
armv8.3a-signed-pointer.s
[AArch64] Enable ARMv8.3-A pointer authentication
2017-08-11 13:14:00 +00:00
basic-a64-diagnostics.s
[AArch64] CCSIDR2 system register
2017-12-20 08:56:41 +00:00
basic-a64-instructions.s
[AArch64] armv8-A doesn't have CRC.
2017-05-03 20:33:52 +00:00
basic-pic.s
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
case-insen-reg-names.s
cfi.s
[AsmPrinterDwarf] Add support for .cfi_restore directive
2017-11-02 12:00:58 +00:00
coff-align.s
[AArch64, COFF] Interpret .align as power of two for COFF as well
2017-07-19 20:14:24 +00:00
coff-basic.ll
[COFF, ARM64] Add support for Windows ARM64 COFF format
2017-06-27 23:58:19 +00:00
coff-debug.ll
Re-land "Fix Bug 30978 by emitting cv file checksums."
2017-09-19 18:14:45 +00:00
coff-gnu.s
[COFF, ARM64] Use '//' as comment character in assembly files in GNU environments
2017-08-13 19:42:05 +00:00
coff-relocations.s
[COFF, ARM64] Fix symbol offsets in ADRP/ADD/LDR/STR relocations
2017-07-26 11:19:17 +00:00
crc.s
[AArch64] Add V8_2aOps feature to Cortex-A55 and 75
2017-09-18 14:46:14 +00:00
cyclone-movi-bug.s
AArch64: work around how Cyclone handles "movi.2d vD, #0 ".
2017-12-18 10:36:00 +00:00
darwin-reloc-addsubimm.s
directive-arch-negative.s
[AArch64] armv8-A doesn't have CRC.
2017-05-03 20:33:52 +00:00
directive-arch.s
directive-cpu-err.s
AArch64: diagnose unrecognized features in .cpu directive.
2017-05-15 19:42:15 +00:00
directive-cpu.s
dot-req-case-insensitive.s
dot-req-diagnostics.s
dot-req.s
[AArch64] Asm: Fix parsing of register aliases that have a name starting with 'z'
2017-12-20 09:45:45 +00:00
elf_osabi_flags.s
elf-extern.s
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
elf-globaladdress.ll
elf-objdump.s
elf-reloc-addsubimm.s
elf-reloc-ldrlit.s
[AArch64] ILP32 Backend Relocation Support
2017-05-02 22:01:48 +00:00
elf-reloc-ldstunsimm.s
elf-reloc-movw.s
elf-reloc-pcreladdressing.s
elf-reloc-tstb.s
[AArch64] ILP32 Backend Relocation Support
2017-05-02 22:01:48 +00:00
elf-reloc-uncondbrimm.s
[AArch64] ILP32 Backend Relocation Support
2017-05-02 22:01:48 +00:00
error-location-during-layout.s
error-location-ldr-pseudo.s
error-location-post-layout.s
error-location.s
[AArch64] ILP32 Backend Relocation Support
2017-05-02 22:01:48 +00:00
expr-shr.s
fixup-out-of-range.s
[COFF, ARM64] Fix symbol offsets in ADRP/ADD/LDR/STR relocations
2017-07-26 11:19:17 +00:00
fullfp16-diagnostics.s
fullfp16-neon-neg.s
gicv3-regs-diagnostics.s
gicv3-regs.s
ilp32-diagnostics.s
[AArch64] ILP32 Backend Relocation Support
2017-05-02 22:01:48 +00:00
inline-asm-modifiers.s
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
inst-directive-diagnostic.s
inst-directive.s
invalid-instructions-spellcheck.s
[AArch64] Enable the mnemonic spell checker
2017-07-13 15:29:13 +00:00
jump-table.s
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
label-arithmetic-darwin.s
label-arithmetic-diags-darwin.s
Add a common error checking for some invalid expressions.
2017-06-22 17:25:35 +00:00
label-arithmetic-diags-elf.s
Add @LINE to checks in a test.
2017-07-06 19:09:35 +00:00
label-arithmetic-elf.s
ldr-pseudo-diagnostics.s
ldr-pseudo-obj-errors.s
ldr-pseudo.s
[MC] Fix constant pools with DenseMap sentinel values
2017-05-30 09:37:11 +00:00
lit.local.cfg
macho-adrp-missing-reloc.s
[AArch64] Force relocations for all ADRP instructions
2017-07-19 20:14:32 +00:00
macho-adrp-page.s
[AArch64] Force relocations for all ADRP instructions
2017-07-19 20:14:32 +00:00
mapping-across-sections.s
mapping-within-section.s
neon-2velem.s
neon-3vdiff.s
neon-aba-abd.s
neon-across.s
neon-add-pairwise.s
neon-add-sub-instructions.s
neon-bitwise-instructions.s
neon-compare-instructions.s
neon-crypto.s
neon-diagnostics.s
[AArch64] Assembler support for the ARMv8.2a dot product instructions
2017-08-09 14:59:54 +00:00
neon-extract.s
neon-facge-facgt.s
neon-frsqrt-frecp.s
neon-halving-add-sub.s
neon-max-min-pairwise.s
neon-max-min.s
neon-mla-mls-instructions.s
neon-mov.s
neon-mul-div-instructions.s
neon-perm.s
neon-rounding-halving-add.s
neon-rounding-shift.s
neon-saturating-add-sub.s
neon-saturating-rounding-shift.s
neon-saturating-shift.s
neon-scalar-abs.s
neon-scalar-add-sub.s
neon-scalar-by-elem-mla.s
neon-scalar-by-elem-mul.s
neon-scalar-by-elem-saturating-mla.s
neon-scalar-by-elem-saturating-mul.s
neon-scalar-compare.s
neon-scalar-cvt.s
neon-scalar-dup.s
neon-scalar-extract-narrow.s
neon-scalar-fp-compare.s
neon-scalar-mul.s
neon-scalar-neg.s
neon-scalar-recip.s
neon-scalar-reduce-pairwise.s
neon-scalar-rounding-shift.s
neon-scalar-saturating-add-sub.s
neon-scalar-saturating-rounding-shift.s
neon-scalar-saturating-shift.s
neon-scalar-shift-imm.s
neon-scalar-shift.s
neon-shift-left-long.s
neon-shift.s
neon-simd-copy.s
neon-simd-ldst-multi-elem.s
neon-simd-ldst-one-elem.s
neon-simd-misc.s
neon-simd-post-ldst-multi-elem.s
neon-simd-shift.s
neon-sxtl.s
neon-tbl.s
neon-uxtl.s
nofp-crypto-diagnostic.s
noneon-diagnostics.s
optional-hash.s
ras-extension.s
[AArch64] Add V8_2aOps feature to Cortex-A55 and 75
2017-09-18 14:46:14 +00:00
shift_extend_op_w_symbol.s
single-slash.s
tls-add-shift.s
tls-relocs.s
[AArch64] ILP32 Backend Relocation Support
2017-05-02 22:01:48 +00:00
trace-regs-diagnostics.s
trace-regs.s