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220 lines
5.6 KiB
Plaintext
220 lines
5.6 KiB
Plaintext
=pod
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=head1 NAME
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lli - directly execute programs from LLVM bitcode
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=head1 SYNOPSIS
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B<lli> [I<options>] [I<filename>] [I<program args>]
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=head1 DESCRIPTION
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B<lli> directly executes programs in LLVM bitcode format. It takes a program
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in LLVM bitcode format and executes it using a just-in-time compiler, if one is
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available for the current architecture, or an interpreter. B<lli> takes all of
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the same code generator options as L<llc|llc>, but they are only effective when
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B<lli> is using the just-in-time compiler.
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If I<filename> is not specified, then B<lli> reads the LLVM bitcode for the
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program from standard input.
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The optional I<args> specified on the command line are passed to the program as
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arguments.
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=head1 GENERAL OPTIONS
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=over
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=item B<-fake-argv0>=I<executable>
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Override the C<argv[0]> value passed into the executing program.
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=item B<-force-interpreter>=I<{false,true}>
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If set to true, use the interpreter even if a just-in-time compiler is available
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for this architecture. Defaults to false.
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=item B<-help>
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Print a summary of command line options.
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=item B<-load>=I<puginfilename>
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Causes B<lli> to load the plugin (shared object) named I<pluginfilename> and use
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it for optimization.
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=item B<-stats>
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Print statistics from the code-generation passes. This is only meaningful for
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the just-in-time compiler, at present.
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=item B<-time-passes>
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Record the amount of time needed for each code-generation pass and print it to
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standard error.
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=item B<-version>
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Print out the version of B<lli> and exit without doing anything else.
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=back
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=head1 TARGET OPTIONS
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=over
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=item B<-mtriple>=I<target triple>
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Override the target triple specified in the input bitcode file with the
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specified string. This may result in a crash if you pick an
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architecture which is not compatible with the current system.
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=item B<-march>=I<arch>
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Specify the architecture for which to generate assembly, overriding the target
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encoded in the bitcode file. See the output of B<llc -help> for a list of
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valid architectures. By default this is inferred from the target triple or
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autodetected to the current architecture.
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=item B<-mcpu>=I<cpuname>
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Specify a specific chip in the current architecture to generate code for.
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By default this is inferred from the target triple and autodetected to
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the current architecture. For a list of available CPUs, use:
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B<llvm-as E<lt> /dev/null | llc -march=xyz -mcpu=help>
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=item B<-mattr>=I<a1,+a2,-a3,...>
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Override or control specific attributes of the target, such as whether SIMD
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operations are enabled or not. The default set of attributes is set by the
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current CPU. For a list of available attributes, use:
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B<llvm-as E<lt> /dev/null | llc -march=xyz -mattr=help>
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=back
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=head1 FLOATING POINT OPTIONS
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=over
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=item B<-disable-excess-fp-precision>
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Disable optimizations that may increase floating point precision.
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=item B<-enable-no-infs-fp-math>
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Enable optimizations that assume no Inf values.
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=item B<-enable-no-nans-fp-math>
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Enable optimizations that assume no NAN values.
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=item B<-enable-unsafe-fp-math>
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Causes B<lli> to enable optimizations that may decrease floating point
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precision.
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=item B<-soft-float>
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Causes B<lli> to generate software floating point library calls instead of
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equivalent hardware instructions.
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=back
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=head1 CODE GENERATION OPTIONS
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=over
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=item B<-code-model>=I<model>
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Choose the code model from:
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default: Target default code model
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small: Small code model
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kernel: Kernel code model
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medium: Medium code model
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large: Large code model
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=item B<-disable-post-RA-scheduler>
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Disable scheduling after register allocation.
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=item B<-disable-spill-fusing>
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Disable fusing of spill code into instructions.
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=item B<-enable-correct-eh-support>
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Make the -lowerinvoke pass insert expensive, but correct, EH code.
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=item B<-jit-enable-eh>
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Exception handling should be enabled in the just-in-time compiler.
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=item B<-join-liveintervals>
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Coalesce copies (default=true).
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=item B<-nozero-initialized-in-bss>
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Don't place zero-initialized symbols into the BSS section.
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=item B<-pre-RA-sched>=I<scheduler>
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Instruction schedulers available (before register allocation):
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=default: Best scheduler for the target
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=none: No scheduling: breadth first sequencing
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=simple: Simple two pass scheduling: minimize critical path and maximize processor utilization
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=simple-noitin: Simple two pass scheduling: Same as simple except using generic latency
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=list-burr: Bottom-up register reduction list scheduling
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=list-tdrr: Top-down register reduction list scheduling
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=list-td: Top-down list scheduler -print-machineinstrs - Print generated machine code
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=item B<-regalloc>=I<allocator>
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Register allocator to use (default=linearscan)
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=bigblock: Big-block register allocator
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=linearscan: linear scan register allocator =local - local register allocator
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=simple: simple register allocator
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=item B<-relocation-model>=I<model>
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Choose relocation model from:
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=default: Target default relocation model
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=static: Non-relocatable code =pic - Fully relocatable, position independent code
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=dynamic-no-pic: Relocatable external references, non-relocatable code
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=item B<-spiller>
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Spiller to use (default=local)
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=simple: simple spiller
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=local: local spiller
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=item B<-x86-asm-syntax>=I<syntax>
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Choose style of code to emit from X86 backend:
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=att: Emit AT&T-style assembly
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=intel: Emit Intel-style assembly
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=back
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=head1 EXIT STATUS
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If B<lli> fails to load the program, it will exit with an exit code of 1.
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Otherwise, it will return the exit code of the program it executes.
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=head1 SEE ALSO
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L<llc|llc>
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=head1 AUTHOR
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Maintained by the LLVM Team (L<http://llvm.org/>).
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=cut
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