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llvm-mirror/test/CodeGen/MIR
Quentin Colombet 3866bb8809 [llc] Add support for several run-pass options.
Previously we could run only one machine pass with the run-pass option.
With that patch, we can now specify several passes with several run-pass
options (or just one option with a list of comma separated passes) and
llc will build the related pipeline.
This is great to test the interaction of two passes that are not
necessarily next to each other in the pipeline, or play with pass
ordering.
Now, we should be at parity with opt for the flexibility of running
passes.

Note: I also moved the run pass option from CommandFlags.h to llc.cpp
because, really, this is needed only there!

llvm-svn: 272356
2016-06-10 00:52:10 +00:00
..
AArch64 [MIR] Check that generic virtual registers get a size. 2016-06-08 23:27:46 +00:00
AMDGPU When printing MIR, output to errs() rather than outs(). 2016-02-19 00:18:46 +00:00
ARM ARM: fix handling of SUB immediates in peephole opt. 2016-05-02 18:30:08 +00:00
Generic [llc] Add support for several run-pass options. 2016-06-10 00:52:10 +00:00
Hexagon Add test/CodeGen/MIR/Hexagon/lit.local.cfg 2016-05-26 18:35:45 +00:00
Mips When printing MIR, output to errs() rather than outs(). 2016-02-19 00:18:46 +00:00
NVPTX When printing MIR, output to errs() rather than outs(). 2016-02-19 00:18:46 +00:00
PowerPC When printing MIR, output to errs() rather than outs(). 2016-02-19 00:18:46 +00:00
X86 [llc] Remove exit-on-error flag from MIR tests (PR27770) 2016-06-09 10:31:05 +00:00