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a72e83c26e
For historic reasons, the behavior of .align differs between targets. Fortunately, there are alternatives, .p2align and .balign, which make the interpretation of the parameter explicit, and which behave consistently across targets. This patch teaches MC to use .p2align instead of .align, so that people reading code for multiple architectures don't have to remember which way each platform does its .align directive. Differential Revision: http://reviews.llvm.org/D16549 llvm-svn: 258750
30 lines
1.3 KiB
LLVM
30 lines
1.3 KiB
LLVM
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -mattr=+soft-float -mips16-hard-float -relocation-model=pic -mips16-constant-islands < %s | FileCheck %s -check-prefix=load-relax1
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; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -mattr=+soft-float -mips16-hard-float -relocation-model=pic -mips16-constant-islands < %s | FileCheck %s -check-prefix=load-relax
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; ModuleID = 'const6a.c'
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target datalayout = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32-S64"
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target triple = "mips--linux-gnu"
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@i = common global i32 0, align 4
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; Function Attrs: nounwind
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define void @t() #0 {
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entry:
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store i32 -559023410, i32* @i, align 4
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; load-relax-NOT: lw ${{[0-9]+}}, $CPI0_0 # 16 bit inst
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; load-relax1: lw ${{[0-9]+}}, $CPI0_0
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; load-relax: jrc $ra
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; load-relax: .p2align 2
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; load-relax: $CPI0_0:
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; load-relax: .4byte 3735943886
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; load-relax: .end t
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call void asm sideeffect ".space 10000", ""() #1, !srcloc !1
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ret void
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}
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attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" }
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attributes #1 = { nounwind }
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!1 = !{i32 121}
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