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llvm-mirror/test/CodeGen
Heejin Ahn 0ab2923b30 [WebAssembly] Rename Emscripten EH functions
Renaming for some Emscripten EH functions has so far been done in
wasm-emscripten-finalize tool in Binaryen. But recently we decided to
make a compilation/linking path that does not rely on
wasm-emscripten-finalize for modifications, so here we move that
functionality to LLVM.

Invoke wrappers are generated in LowerEmscriptenEHSjLj pass, but final
wasm types are not available in the IR pass, we need to rename them at
the end of the pipeline.

This patch also removes uses of `emscripten_longjmp_jmpbuf` in
LowerEmscriptenEHSjLj pass, replacing that with `emscripten_longjmp`.
`emscripten_longjmp_jmpbuf` is lowered to `emscripten_longjmp`, but
previously we generated calls to `emscripten_longjmp_jmpbuf` in
LowerEmscriptenEHSjLj pass because it takes `jmp_buf*` instead of `i32`.
But we were able use `ptrtoint` to make it use `emscripten_longjmp`
directly here.

Addresses:
https://github.com/WebAssembly/binaryen/issues/3043
https://github.com/WebAssembly/binaryen/issues/3081

Companions:
https://github.com/WebAssembly/binaryen/pull/3191
https://github.com/emscripten-core/emscripten/pull/12399

Reviewed By: dschuff, tlively, sbc100

Differential Revision: https://reviews.llvm.org/D88697
2020-10-07 09:42:49 -07:00
..
AArch64 [SVE] Lower fixed length VECREDUCE_OR operation 2020-10-07 09:56:25 -05:00
AMDGPU [AMDGPU] Support disassembly for AMDGPU kernel descriptors 2020-10-07 20:39:43 +05:30
ARC
ARM [ARM] Regenerate vldlane tests 2020-10-07 11:47:03 +01:00
AVR
BPF BPF: add AdjustOpt IR pass to generate verifier friendly codes 2020-10-07 08:49:10 -07:00
Generic
Hexagon [Hexagon] Move selection of HVX multiply from lowering to patterns 2020-10-02 16:04:34 -05:00
Inputs
Lanai
Mips
MIR
MSP430
NVPTX
PowerPC [PowerPC] Add builtins for xvtdiv(dp|sp) and xvtsqrt(dp|sp). 2020-10-04 16:24:20 +00:00
RISCV
SPARC [Sparc] Remove cast that truncates immediate operands to 32 bits. 2020-10-02 20:14:55 -04:00
SystemZ
Thumb
Thumb2 [ARM] Fold select_cc(vecreduce_[u|s][min|max], x) into VMINV or VMAXV 2020-10-06 14:44:58 +01:00
VE [VE] Support register and frame-index pair correctly 2020-10-05 18:36:53 +09:00
WebAssembly [WebAssembly] Rename Emscripten EH functions 2020-10-07 09:42:49 -07:00
WinCFGuard
WinEH
X86 [SDag] SimplifyDemandedBits: simplify to FP constant if all bits known 2020-10-07 09:24:38 +01:00
XCore