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aeecb81472
excluding visibility bits. Mips specific standalone assembler directive "set at". This directive changes the general purpose register that the assembler will use when given the symbolic register name $at. This does not include negative testing. That will come in a future patch. A side affect of this patch recognizes the different GPR register names for temporaries between old abi and new abi so a test case for that is included. Contributer: Vladimir Medic llvm-svn: 175686
37 lines
1.4 KiB
ArmAsm
37 lines
1.4 KiB
ArmAsm
# OABI (o32, o64) have a different symbolic register
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# set for the A and T registers because the NABI allows
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# for 4 more register parameters (A registers) offsetting
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# the T registers.
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#
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# For now just check N64
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# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding \
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# RUN: -mcpu=mips64r2 -arch=mips64 | \
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# RUN: FileCheck %s
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# CHECK: .section __TEXT,__text,regular,pure_instructions
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.text
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foo:
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# CHECK: add $16, $16, $4 # encoding: [0x02,0x04,0x80,0x20]
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add $s0,$s0,$a0
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# CHECK: add $16, $16, $6 # encoding: [0x02,0x06,0x80,0x20]
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add $s0,$s0,$a2
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# CHECK: add $16, $16, $7 # encoding: [0x02,0x07,0x80,0x20]
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add $s0,$s0,$a3
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# CHECK: add $16, $16, $8 # encoding: [0x02,0x08,0x80,0x20]
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add $s0,$s0,$a4
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# CHECK: add $16, $16, $9 # encoding: [0x02,0x09,0x80,0x20]
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add $s0,$s0,$a5
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# CHECK: add $16, $16, $10 # encoding: [0x02,0x0a,0x80,0x20]
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add $s0,$s0,$a6
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# CHECK: add $16, $16, $11 # encoding: [0x02,0x0b,0x80,0x20]
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add $s0,$s0,$a7
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# CHECK: add $16, $16, $12 # encoding: [0x02,0x0c,0x80,0x20]
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add $s0,$s0,$t0
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# CHECK: add $16, $16, $13 # encoding: [0x02,0x0d,0x80,0x20]
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add $s0,$s0,$t1
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# CHECK: add $16, $16, $14 # encoding: [0x02,0x0e,0x80,0x20]
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add $s0,$s0,$t2
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# CHECK: add $16, $16, $15 # encoding: [0x02,0x0f,0x80,0x20]
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add $s0,$s0,$t3
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