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af0512fc8d
llvm-mirror/lib/Target/ARM
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Rafael Espindola af0512fc8d add a README.txt 
llvm-svn: 29814
2006-08-22 12:22:46 +00:00
..
.cvsignore Ignore generated files 2006-05-27 01:23:30 +00:00
ARM.h added a skeleton of the ARM backend 2006-05-14 22:18:28 +00:00
ARM.td getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd. 2006-05-18 00:12:58 +00:00
ARMAsmPrinter.cpp add a "load effective address" 2006-08-17 17:09:40 +00:00
ARMFrameInfo.h Declare the callee saved regs 2006-08-16 14:43:33 +00:00
ARMInstrInfo.cpp change the addressing mode of the str instruction to reg+imm 2006-08-08 20:35:03 +00:00
ARMInstrInfo.h change the addressing mode of the str instruction to reg+imm 2006-08-08 20:35:03 +00:00
ARMInstrInfo.td initial support for select 2006-08-21 22:00:32 +00:00
ARMISelDAGToDAG.cpp initial support for select 2006-08-21 22:00:32 +00:00
ARMRegisterInfo.cpp add a "load effective address" 2006-08-17 17:09:40 +00:00
ARMRegisterInfo.h getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd. 2006-05-18 00:12:58 +00:00
ARMRegisterInfo.td Constify some methods. Patch provided by Anton Vayvod, thanks! 2006-08-17 22:00:08 +00:00
ARMTargetMachine.cpp initial support for select 2006-08-21 22:00:32 +00:00
ARMTargetMachine.h Declare the callee saved regs 2006-08-16 14:43:33 +00:00
Makefile added a skeleton of the ARM backend 2006-05-14 22:18:28 +00:00
README.txt add a README.txt 2006-08-22 12:22:46 +00:00

README.txt 

//===---------------------------------------------------------------------===//
// Random ideas for the ARM backend.
//===---------------------------------------------------------------------===//

Consider implementing a select with two conditional moves:

cmp x, y
moveq dst, a
movne dst, b