Francis Visoiu Mistrih af104b58a6 [MIR] Add support for the frame-destroy MachineInstr flag ... We are printing / parsing the `frame-setup` MachineInstr flag but not the `frame-destroy` one. Differential Revision: https://reviews.llvm.org/D41509 llvm-svn: 322071		2018-01-09 11:33:22 +00:00
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AArch64	[MIR] Add support for the frame-destroy MachineInstr flag	2018-01-09 11:33:22 +00:00
AMDGPU
ARC
ARM	[ARM] Fix PR35379 - incorrect unwind information when compiling with -Oz	2018-01-08 14:47:19 +00:00
AVR
BPF
Generic
Hexagon	[Hexagon] Even simpler patterns for sign- and zero-extending HVX vectors	2018-01-05 22:31:11 +00:00
Inputs
Lanai
Mips
MIR	[MIR] Add support for the frame-destroy MachineInstr flag	2018-01-09 11:33:22 +00:00
MSP430
Nios2	[Nios2] Arithmetic instructions for R1 and R2 ISA.	2018-01-09 11:15:08 +00:00
NVPTX
PowerPC	[PowerPC] Can not assume an intrinsic argument is a simple type.	2018-01-09 03:03:41 +00:00
RISCV
SPARC
SystemZ
Thumb	[ARM] Fix PR35481	2018-01-08 11:32:37 +00:00
Thumb2
WebAssembly
WinEH
X86	Instrument Control Flow For Indirect Branch Tracking	2018-01-09 08:51:18 +00:00
XCore