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d5cead992a
This updates the MIRPrinter to include the regclass when printing virtual register defs, which is already valid syntax for the parser. That is, given 64 bit %0 and %1 in a "gpr" regbank, %1(s64) = COPY %0(s64) would now be written as %1:gpr(s64) = COPY %0(s64) While this change alone introduces a bit of redundancy with the registers block, it allows us to update the tests to be more concise and understandable and brings us closer to being able to remove the registers block completely. Note: We generally only print the class in defs, but there is one exception. If there are uses without any defs whatsoever, we'll print the class on all uses. I'm not completely convinced this comes up in meaningful machine IR, but for now the MIRParser and MachineVerifier both accept that kind of stuff, so we don't want to have a situation where we can print something we can't parse. llvm-svn: 316479
68 lines
4.3 KiB
YAML
68 lines
4.3 KiB
YAML
# RUN: llc %s -run-pass greedy -o - | FileCheck %s
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# Check that we don't insert spill code for undef values.
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# Uninitialized memory for them is fine.
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# PR33311
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--- |
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; ModuleID = 'stuff.ll'
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target triple = "aarch64--"
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@g = external global i32
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define void @foobar() {
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ret void
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}
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...
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---
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name: foobar
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alignment: 2
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gpr32 }
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- { id: 1, class: gpr32 }
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- { id: 2, class: gpr32all }
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- { id: 3, class: gpr32 }
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- { id: 4, class: gpr64common }
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- { id: 5, class: gpr32 }
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- { id: 6, class: gpr64common }
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- { id: 7, class: gpr32 }
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- { id: 8, class: gpr32 }
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- { id: 9, class: gpr64 }
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body: |
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bb.0:
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liveins: %x0
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successors: %bb.1, %bb.2
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; %8 is going to be spilled.
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; But on that path, we don't care about its value.
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; Emit a simple KILL instruction instead of an
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; actual spill.
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; CHECK: [[UNDEF:%[0-9]+]]:gpr32 = IMPLICIT_DEF
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; CHECK-NEXT: KILL [[UNDEF]]
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%8 = IMPLICIT_DEF
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; %9 us going to be spilled.
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; But it is only partially undef.
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; Make sure we spill it properly
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; CHECK: [[NINE:%[0-9]+]]:gpr64 = COPY %x0
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; CHECK: [[NINE]].sub_32:gpr64 = IMPLICIT_DEF
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; CHECK-NEXT: STRXui [[NINE]]
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%9 = COPY %x0
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%9.sub_32 = IMPLICIT_DEF
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CBNZW %wzr, %bb.2
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B %bb.1
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bb.1:
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%4 = ADRP target-flags(aarch64-page) @g
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%8 = LDRWui %4, target-flags(aarch64-pageoff, aarch64-nc) @g :: (volatile dereferenceable load 4 from @g)
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INLINEASM $nop, 1, 12, implicit-def dead early-clobber %x0, 12, implicit-def dead early-clobber %x1, 12, implicit-def dead early-clobber %x2, 12, implicit-def dead early-clobber %x3, 12, implicit-def dead early-clobber %x4, 12, implicit-def dead early-clobber %x5, 12, implicit-def dead early-clobber %x6, 12, implicit-def dead early-clobber %x7, 12, implicit-def dead early-clobber %x8, 12, implicit-def dead early-clobber %x9, 12, implicit-def dead early-clobber %x10, 12, implicit-def dead early-clobber %x11, 12, implicit-def dead early-clobber %x12, 12, implicit-def dead early-clobber %x13, 12, implicit-def dead early-clobber %x14, 12, implicit-def dead early-clobber %x15, 12, implicit-def dead early-clobber %x16, 12, implicit-def dead early-clobber %x17, 12, implicit-def dead early-clobber %x18, 12, implicit-def dead early-clobber %x19, 12, implicit-def dead early-clobber %x20, 12, implicit-def dead early-clobber %x21, 12, implicit-def dead early-clobber %x22, 12, implicit-def dead early-clobber %x23, 12, implicit-def dead early-clobber %x24, 12, implicit-def dead early-clobber %x25, 12, implicit-def dead early-clobber %x26, 12, implicit-def dead early-clobber %x27, 12, implicit-def dead early-clobber %x28, 12, implicit-def dead early-clobber %fp, 12, implicit-def dead early-clobber %lr
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bb.2:
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INLINEASM $nop, 1, 12, implicit-def dead early-clobber %x0, 12, implicit-def dead early-clobber %x1, 12, implicit-def dead early-clobber %x2, 12, implicit-def dead early-clobber %x3, 12, implicit-def dead early-clobber %x4, 12, implicit-def dead early-clobber %x5, 12, implicit-def dead early-clobber %x6, 12, implicit-def dead early-clobber %x7, 12, implicit-def dead early-clobber %x8, 12, implicit-def dead early-clobber %x9, 12, implicit-def dead early-clobber %x10, 12, implicit-def dead early-clobber %x11, 12, implicit-def dead early-clobber %x12, 12, implicit-def dead early-clobber %x13, 12, implicit-def dead early-clobber %x14, 12, implicit-def dead early-clobber %x15, 12, implicit-def dead early-clobber %x16, 12, implicit-def dead early-clobber %x17, 12, implicit-def dead early-clobber %x18, 12, implicit-def dead early-clobber %x19, 12, implicit-def dead early-clobber %x20, 12, implicit-def dead early-clobber %x21, 12, implicit-def dead early-clobber %x22, 12, implicit-def dead early-clobber %x23, 12, implicit-def dead early-clobber %x24, 12, implicit-def dead early-clobber %x25, 12, implicit-def dead early-clobber %x26, 12, implicit-def dead early-clobber %x27, 12, implicit-def dead early-clobber %x28, 12, implicit-def dead early-clobber %fp, 12, implicit-def dead early-clobber %lr
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%6 = ADRP target-flags(aarch64-page) @g
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%w0 = MOVi32imm 42
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STRWui %8, %6, target-flags(aarch64-pageoff, aarch64-nc) @g :: (volatile store 4 into @g)
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STRXui %9, %6, target-flags(aarch64-pageoff, aarch64-nc) @g :: (volatile store 8 into @g)
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RET_ReallyLR implicit killed %w0
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...
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