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llvm-mirror/test/MC/AArch64/elf-reloc-ldrlit.s
Joel Jones ac916443ad [AArch64] ILP32 Backend Relocation Support
Remove "_NC" suffix and semantics from TLSDESC_LD{64,32}_LO12 and
  TLSDESC_ADD_LO12 relocations
Rearrange ordering in AArch64.def to follow relocation encoding
Fix name:
  R_AARCH64_P32_LD64_GOT_LO12_NC => R_AARCH64_P32_LD32_GOT_LO12_NC
Add support for several "TLS", "TLSGD", and "TLSLD" relocations for
  ILP32
Fix return values from isNonILP32reloc
Add implementations for
  R_AARCH64_ADR_PREL_PG_HI21_NC, R_AARCH64_P32_LD32_GOT_LO12_NC,
  R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC,
  R_AARCH64_P32_TLSDESC_LD32_LO12, R_AARCH64_LD64_GOT_LO12_NC,
  *TLSLD_LDST128_DTPREL_LO12, *TLSLD_LDST128_DTPREL_LO12_NC,
  *TLSLE_LDST128_TPREL_LO12, *TLSLE_LDST128_TPREL_LO12_NC
Modify error messages to give name of equivalent relocation in the
  ABI not being used, along with better checking for non-existent
  requested relocations.
Added assembler support for "pg_hi21_nc"
Relocation definitions added without implementations:
  R_AARCH64_P32_TLSDESC_ADR_PREL21, R_AARCH64_P32_TLSGD_ADR_PREL21,
  R_AARCH64_P32_TLSGD_ADD_LO12_NC, R_AARCH64_P32_TLSLD_ADR_PREL21, 
  R_AARCH64_P32_TLSLD_ADR_PAGE21, R_AARCH64_P32_TLSLD_ADD_LO12_NC,
  R_AARCH64_P32_TLSLD_LD_PREL19, R_AARCH64_P32_TLSDESC_LD_PREL19,
  R_AARCH64_P32_TLSGD_ADR_PAGE21, R_AARCH64_P32_TLS_DTPREL,
  R_AARCH64_P32_TLS_DTPMOD, R_AARCH64_P32_TLS_TPREL,
  R_AARCH64_P32_TLSDESC
Fix encoding:
  R_AARCH64_P32_TLSDESC_ADR_PAGE21

Reviewers: Peter Smith

Patch by: Joel Jones (jjones@cavium.com)

Differential Revision: https://reviews.llvm.org/D32072

llvm-svn: 301980
2017-05-02 22:01:48 +00:00

29 lines
1.1 KiB
ArmAsm

// RUN: llvm-mc -triple=aarch64-none-linux-gnu -filetype=obj %s -o - | \
// RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s
// RUN: llvm-mc -target-abi=ilp32 -triple=aarch64-none-linux-gnu \
// RUN: -filetype=obj %s -o - | \
// RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ-ILP32 %s
ldr x0, some_label
ldr w3, some_label
ldrsw x9, some_label
prfm pldl3keep, some_label
// OBJ: Relocations [
// OBJ-NEXT: Section {{.*}} .rela.text {
// OBJ-NEXT: 0x0 R_AARCH64_LD_PREL_LO19 some_label 0x0
// OBJ-NEXT: 0x4 R_AARCH64_LD_PREL_LO19 some_label 0x0
// OBJ-NEXT: 0x8 R_AARCH64_LD_PREL_LO19 some_label 0x0
// OBJ-NEXT: 0xC R_AARCH64_LD_PREL_LO19 some_label 0x0
// OBJ-NEXT: }
// OBJ-NEXT: ]
// OBJ-ILP32: Relocations [
// OBJ-ILP32-NEXT: Section {{.*}} .rela.text {
// OBJ-ILP32-NEXT: 0x0 R_AARCH64_P32_LD_PREL_LO19 some_label 0x0
// OBJ-ILP32-NEXT: 0x4 R_AARCH64_P32_LD_PREL_LO19 some_label 0x0
// OBJ-ILP32-NEXT: 0x8 R_AARCH64_P32_LD_PREL_LO19 some_label 0x0
// OBJ-ILP32-NEXT: 0xC R_AARCH64_P32_LD_PREL_LO19 some_label 0x0
// OBJ-ILP32-NEXT: }
// OBJ-ILP32-NEXT: ]