mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-22 04:22:57 +02:00
5b153fc53a
physical register $r1 to $r0. GNU disassembler recognizes an "or" instruction as a "move", and this change makes the disassembled code easier to read. Original patch by Reed Kotler. llvm-svn: 170655
28 lines
548 B
LLVM
28 lines
548 B
LLVM
; RUN: llc -march=mipsel -disable-mips-delay-filler < %s | FileCheck %s
|
|
|
|
@g = external global i32
|
|
|
|
; CHECK: or $gp
|
|
; CHECK: jalr $25
|
|
; CHECK: nop
|
|
; CHECK-NOT: or $gp
|
|
; CHECK: jalr $25
|
|
|
|
define void @f0() nounwind {
|
|
entry:
|
|
tail call void @externalFunc() nounwind
|
|
tail call fastcc void @internalFunc()
|
|
ret void
|
|
}
|
|
|
|
declare void @externalFunc()
|
|
|
|
define internal fastcc void @internalFunc() nounwind noinline {
|
|
entry:
|
|
%0 = load i32* @g, align 4
|
|
%inc = add nsw i32 %0, 1
|
|
store i32 %inc, i32* @g, align 4
|
|
ret void
|
|
}
|
|
|