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4e2def1840
TableGen had been nicely generating code to print a number of instructions using shorter aliases (and PowerPC has plenty of short mnemonics), but we were not calling it. For some of the aliases we support in the parser, TableGen can't infer the "inverse" alias relationship, so there is still more to do. Thus, after some hours of updating test cases... llvm-svn: 235616
95 lines
1.9 KiB
Plaintext
95 lines
1.9 KiB
Plaintext
# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s
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# CHECK: add 1, 2, 3
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0x7c 0x22 0x1a 0x14
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# CHECK: add 1, 2, 3
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0x7c 0x22 0x1a 0x14
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# CHECK: add 0, 0, 0
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0x7c 0x00 0x02 0x14
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# CHECK: add 31, 31, 31
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0x7f 0xff 0xfa 0x14
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# CHECK: li 1, 0
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0x38 0x20 0x00 0x00
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# CHECK: addi 1, 2, 0
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0x38 0x22 0x00 0x00
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# CHECK: li 1, -32768
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0x38 0x20 0x80 0x00
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# CHECK: li 1, 32767
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0x38 0x20 0x7f 0xff
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# CHECK: ori 1, 2, 0
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0x60 0x41 0x00 0x00
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# CHECK: ori 1, 2, 65535
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0x60 0x41 0xff 0xff
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# CHECK: lis 1, 0
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0x3c 0x20 0x00 0x00
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# CHECK: lis 1, -1
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0x3c 0x20 0xff 0xff
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# CHECK: lwz 1, 0(0)
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0x80 0x20 0x00 0x00
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# CHECK: lwz 1, 0(0)
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0x80 0x20 0x00 0x00
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# CHECK: lwz 1, 0(31)
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0x80 0x3f 0x00 0x00
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# CHECK: lwz 1, 0(31)
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0x80 0x3f 0x00 0x00
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# CHECK: lwz 1, -32768(2)
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0x80 0x22 0x80 0x00
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# CHECK: lwz 1, 32767(2)
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0x80 0x22 0x7f 0xff
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# CHECK: ld 1, 0(0)
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0xe8 0x20 0x00 0x00
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# CHECK: ld 1, 0(0)
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0xe8 0x20 0x00 0x00
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# CHECK: ld 1, 0(31)
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0xe8 0x3f 0x00 0x00
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# CHECK: ld 1, 0(31)
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0xe8 0x3f 0x00 0x00
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# CHECK: ld 1, -32768(2)
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0xe8 0x22 0x80 0x00
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# CHECK: ld 1, 32764(2)
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0xe8 0x22 0x7f 0xfc
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# CHECK: ld 1, 4(2)
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0xe8 0x22 0x00 0x04
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# CHECK: ld 1, -4(2)
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0xe8 0x22 0xff 0xfc
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# CHECK: b .+1024
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0x48 0x00 0x04 0x00
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# CHECK: ba 1024
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0x48 0x00 0x04 0x02
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# FIXME: decode as beq 0, .+1024
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# CHECK: bt 2, .+1024
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0x41 0x82 0x04 0x00
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# FIXME: decode as beqa 0, 1024
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# CHECK: bta 2, 1024
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0x41 0x82 0x04 0x02
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