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llvm-mirror/include/llvm/Target
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Geoff Berry 8e556287ce [TargetRegisterInfo, AArch64] Add target hook for isConstantPhysReg(). 
Summary:
The current implementation of isConstantPhysReg() checks for defs of
physical registers to determine if they are constant.  Some
architectures (e.g. AArch64 XZR/WZR) have registers that are constant
and may be used as destinations to indicate the generated value is
discarded, preventing isConstantPhysReg() from returning true.  This
change adds a TargetRegisterInfo hook that overrides the no defs check
for cases such as this.

Reviewers: MatzeB, qcolombet, t.p.northover, jmolloy

Subscribers: junbuml, aemerson, mcrosier, rengolin

Differential Revision: https://reviews.llvm.org/D24570

llvm-svn: 282543
2016-09-27 22:17:27 +00:00
..
CostTable.h [modules] Add missing include. 2016-08-19 08:30:42 +00:00
GenericOpcodes.td GlobalISel: support translation of global addresses. 2016-09-12 12:10:41 +00:00
Target.td [XRay] ARM 32-bit no-Thumb support in LLVM 2016-09-19 00:54:35 +00:00
TargetCallingConv.h
TargetCallingConv.td
TargetFrameLowering.h
TargetInstrInfo.h Finish renaming remaining analyzeBranch functions 2016-09-14 20:43:16 +00:00
TargetIntrinsicInfo.h GlobalISel: support translation of intrinsic calls. 2016-07-29 22:32:36 +00:00
TargetItinerary.td
TargetLowering.h Add support to optionally limit the size of jump tables. 2016-09-26 15:32:33 +00:00
TargetLoweringObjectFile.h Trying to fix Mangler memory leak in TargetLoweringObjectFile. 2016-09-16 11:50:57 +00:00
TargetMachine.h llc: Add -start-before/-stop-before options 2016-09-23 21:46:02 +00:00
TargetOpcodes.def [XRay] ARM 32-bit no-Thumb support in LLVM 2016-09-19 00:54:35 +00:00
TargetOpcodes.h [GlobalISel] Don't RegBankSelect target-specific instructions. 2016-08-02 11:41:16 +00:00
TargetOptions.h Clang patch r280064 introduced ways to set the FP exceptions and denormal 2016-08-31 14:17:38 +00:00
TargetRecip.h
TargetRegisterInfo.h [TargetRegisterInfo, AArch64] Add target hook for isConstantPhysReg(). 2016-09-27 22:17:27 +00:00
TargetSchedule.td
TargetSelectionDAG.td [SelectionDAG] Rename fextend -> fpextend, fround -> fpround, frnd -> fround 2016-08-18 20:08:15 +00:00
TargetSubtargetInfo.h [XRay] ARM 32-bit no-Thumb support in LLVM 2016-09-19 00:54:35 +00:00