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llvm-mirror/test/CodeGen
2016-10-11 16:04:37 +00:00
..
AArch64 Revert "Codegen: Tail-duplicate during placement." 2016-10-11 07:36:11 +00:00
AMDGPU AMDGPU/SI: Update ISA version numbers for Tonga and Polaris10/11. 2016-10-11 16:00:47 +00:00
ARM [ARM] Fix registers clobbered by SjLj EH on soft-float targets 2016-10-11 10:06:59 +00:00
AVR [RegAllocGreedy] Attempt to split unspillable live intervals 2016-10-11 01:04:36 +00:00
BPF
Generic
Hexagon [Hexagon] Avoid replacing full regs with subregisters in tied operands 2016-10-06 16:18:04 +00:00
Inputs
Lanai
Mips [mips][fastisel] Consider soft-float an unsupported floating point mode 2016-10-04 10:35:07 +00:00
MIR MIRParser: Rewrite register info initialization; mostly NFC 2016-10-11 03:13:01 +00:00
MSP430 [SelectionDAGBuilder] Support llvm.flt.rounds on targets where i32 is not legal 2016-10-10 20:45:15 +00:00
NVPTX
PowerPC Revert "Codegen: Tail-duplicate during placement." 2016-10-11 07:36:11 +00:00
SPARC This pass, fixing an erratum in some LEON 2 processors ensures that the SDIV instruction is not issued, but replaced by SDIVcc instead, which does not exhibit the error. Unit test included. 2016-10-10 08:53:06 +00:00
SystemZ swifterror: Don't compute swifterror vregs during instruction selection 2016-10-07 22:06:55 +00:00
Thumb [Thumb] Save/restore high registers in Thumb1 pro/epilogues 2016-10-11 10:12:25 +00:00
Thumb2 [Thumb] Save/restore high registers in Thumb1 pro/epilogues 2016-10-11 10:12:25 +00:00
WebAssembly Revert "Codegen: Tail-duplicate during placement." 2016-10-11 07:36:11 +00:00
WinEH
X86 [x86] add tests to show missed folds for masked bools 2016-10-11 16:04:37 +00:00
XCore