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c7f8ab2cc1
Summary: Made it convert from register to stack based instructions, and removed the registers. Fixes to related code that was expecting register based instructions. Added the correct testing flag to all tests, depending on what the format they were expecting so far. Translated one test to stack format as example: reg-stackify-stack.ll tested: llvm-lit -v `find test -name WebAssembly` unittests/MC/* Reviewers: dschuff, sunfish Subscribers: sbc100, jgravelle-google, eraman, aheejin, llvm-commits, jfb Differential Revision: https://reviews.llvm.org/D51241 llvm-svn: 340750
63 lines
1.2 KiB
LLVM
63 lines
1.2 KiB
LLVM
; RUN: llc < %s -asm-verbose=false -wasm-keep-registers | FileCheck %s
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; Test that integer div and rem by constant are optimized appropriately.
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target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
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target triple = "wasm32-unknown-unknown"
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; CHECK-LABEL: test_udiv_2:
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; CHECK: i32.shr_u
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define i32 @test_udiv_2(i32 %x) {
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%t = udiv i32 %x, 2
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ret i32 %t
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}
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; CHECK-LABEL: test_udiv_5:
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; CHECK: i32.div_u
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define i32 @test_udiv_5(i32 %x) {
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%t = udiv i32 %x, 5
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ret i32 %t
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}
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; CHECK-LABEL: test_sdiv_2:
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; CHECK: i32.div_s
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define i32 @test_sdiv_2(i32 %x) {
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%t = sdiv i32 %x, 2
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ret i32 %t
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}
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; CHECK-LABEL: test_sdiv_5:
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; CHECK: i32.div_s
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define i32 @test_sdiv_5(i32 %x) {
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%t = sdiv i32 %x, 5
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ret i32 %t
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}
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; CHECK-LABEL: test_urem_2:
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; CHECK: i32.and
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define i32 @test_urem_2(i32 %x) {
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%t = urem i32 %x, 2
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ret i32 %t
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}
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; CHECK-LABEL: test_urem_5:
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; CHECK: i32.rem_u
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define i32 @test_urem_5(i32 %x) {
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%t = urem i32 %x, 5
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ret i32 %t
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}
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; CHECK-LABEL: test_srem_2:
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; CHECK: i32.rem_s
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define i32 @test_srem_2(i32 %x) {
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%t = srem i32 %x, 2
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ret i32 %t
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}
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; CHECK-LABEL: test_srem_5:
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; CHECK: i32.rem_s
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define i32 @test_srem_5(i32 %x) {
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%t = srem i32 %x, 5
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ret i32 %t
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}
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