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dc91ae935f
The previous names were both misleading (the MachineLegalizer actually contained the info tables) and inconsistent with the selector & translator (in having a "Machine") prefix. This should make everything sensible again. The only functional change is the name of a couple of command-line options. llvm-svn: 284287
46 lines
1.1 KiB
YAML
46 lines
1.1 KiB
YAML
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
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--- |
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64--"
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define void @test_icmp() {
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entry:
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ret void
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}
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...
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---
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name: test_icmp
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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- { id: 3, class: _ }
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- { id: 4, class: _ }
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- { id: 5, class: _ }
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- { id: 6, class: _ }
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- { id: 7, class: _ }
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- { id: 8, class: _ }
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- { id: 9, class: _ }
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- { id: 10, class: _ }
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body: |
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bb.0.entry:
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liveins: %x0, %x1, %x2, %x3
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%0(s64) = COPY %x0
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%1(s64) = COPY %x0
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%2(s8) = G_TRUNC %0
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%3(s8) = G_TRUNC %1
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; CHECK: %4(s1) = G_ICMP intpred(sge), %0(s64), %1
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%4(s1) = G_ICMP intpred(sge), %0, %1
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; CHECK: [[LHS32:%[0-9]+]](s32) = G_ZEXT %2
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; CHECK: [[RHS32:%[0-9]+]](s32) = G_ZEXT %3
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; CHECK: %8(s1) = G_ICMP intpred(ult), [[LHS32]](s32), [[RHS32]]
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%8(s1) = G_ICMP intpred(ult), %2, %3
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%9(p0) = G_INTTOPTR %0(s64)
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%10(s1) = G_ICMP intpred(eq), %9(p0), %9(p0)
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...
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