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58b914129e
Author: milena.vujosevic.janicic Reviewers: sdardis The patch extends size reduction pass for MicroMIPS. It introduces reduction of two instructions into one instruction: Two SW instructions are transformed into one SWP instrucition. Two LW instructions are transformed into one LWP instrucition. Differential Revision: https://reviews.llvm.org/D39115 llvm-svn: 334595
51 lines
1.7 KiB
C++
51 lines
1.7 KiB
C++
//===-- Mips.h - Top-level interface for Mips representation ----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the entry points for global functions defined in
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// the LLVM Mips back-end.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MIPS_MIPS_H
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#define LLVM_LIB_TARGET_MIPS_MIPS_H
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#include "MCTargetDesc/MipsMCTargetDesc.h"
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#include "llvm/Target/TargetMachine.h"
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namespace llvm {
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class MipsTargetMachine;
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class ModulePass;
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class FunctionPass;
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class MipsRegisterBankInfo;
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class MipsSubtarget;
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class MipsTargetMachine;
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class InstructionSelector;
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class PassRegistry;
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ModulePass *createMipsOs16Pass();
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ModulePass *createMips16HardFloatPass();
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FunctionPass *createMipsModuleISelDagPass();
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FunctionPass *createMipsOptimizePICCallPass();
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FunctionPass *createMipsDelaySlotFillerPass();
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FunctionPass *createMipsBranchExpansion();
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FunctionPass *createMipsConstantIslandPass();
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FunctionPass *createMicroMipsSizeReducePass();
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InstructionSelector *createMipsInstructionSelector(const MipsTargetMachine &,
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MipsSubtarget &,
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MipsRegisterBankInfo &);
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void initializeMipsDelaySlotFillerPass(PassRegistry &);
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void initializeMipsBranchExpansionPass(PassRegistry &);
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void initializeMicroMipsSizeReducePass(PassRegistry &);
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} // end namespace llvm;
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#endif
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