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llvm-mirror/test/CodeGen
James Y Knight b1184c5419 Fix handling of the 'n' asm constraint with invalid operands.
It had accidently accepted a symbol+offset value (and emitted
incorrect code for it, keeping only the offset part) instead of
properly reporting the constraint as invalid.

Differential Revision: http://reviews.llvm.org/D11039

llvm-svn: 242040
2015-07-13 16:36:22 +00:00
..
AArch64 [ShrinkWrap][PEI] Do not insert epilogue for unreachable blocks. 2015-07-10 22:09:55 +00:00
AMDGPU AMDGPU/SI: Select mad patterns to v_mac_f32 2015-07-13 15:47:57 +00:00
ARM ARM: Fix cttz expansion on vector types. 2015-07-13 15:37:30 +00:00
BPF
CPP
Generic llc: Add a 'run-pass' option. 2015-07-06 17:44:26 +00:00
Hexagon [Hexagon] Add support for atomic RMW operations 2015-07-09 14:51:21 +00:00
Inputs
Mips
MIR MIR Serialization: Serialize the virtual register operands. 2015-07-10 22:51:20 +00:00
MSP430
NVPTX Actually support volatile memcpys in NVPTX lowering 2015-07-10 15:40:33 +00:00
PowerPC [PowerPC] Make use of the TargetRecip system 2015-07-12 02:33:57 +00:00
SPARC [SPARC] Cleanup handling of the Y/ASR registers. 2015-07-08 16:25:12 +00:00
SystemZ
Thumb
Thumb2 ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2 2015-07-10 18:28:49 +00:00
WebAssembly [WebAssembly] Create a CodeGen unittest directory. 2015-07-06 23:14:57 +00:00
WinEH [SEH] Push reloads of the SEH code past phi nodes 2015-07-10 22:21:54 +00:00
X86 Fix handling of the 'n' asm constraint with invalid operands. 2015-07-13 16:36:22 +00:00
XCore