1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-21 12:02:58 +02:00
llvm-mirror/test/MC/Mips/mips3
Daniel Sanders 4cf61e5269 [mips] Range check uimm20 and fixed a bug this revealed.
Summary:
The bug was that dextu's operand 3 would print 0-31 instead of 32-63 when
printing assembly. This came up when replacing
MipsInstPrinter::printUnsignedImm() with a version that could handle arbitrary
bit widths.

MipsAsmPrinter::printUnsignedImm*() don't seem to be used so they have been
removed.

Reviewers: vkalintiris

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D15521

llvm-svn: 262231
2016-02-29 16:06:38 +00:00
..
invalid-mips4-wrong-error.s [mips] Add support for COP1's Branch-On-Cond-Likely instructions 2014-10-17 14:08:28 +00:00
invalid-mips4.s [mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6 2014-06-12 15:00:17 +00:00
invalid-mips5-wrong-error.s [mips] Improve the error messages given by MipsAsmParser. 2014-09-16 15:00:52 +00:00
invalid-mips5.s [mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6 2014-06-12 15:00:17 +00:00
invalid-mips32.s [mips] SYNC $stype instruction was added in Mips32 2014-06-18 17:10:30 +00:00
invalid-mips32r2.s [mips] Marked the DI/EI instruction aliases as MIPS32r2 2014-10-16 15:23:52 +00:00
valid.s [mips] Range check uimm20 and fixed a bug this revealed. 2016-02-29 16:06:38 +00:00