1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-20 19:42:54 +02:00
llvm-mirror/test/CodeGen/Hexagon/hwloop3.ll
Brendon Cahoon 90c3ea5b75 [Hexagon] Generate more hardware loops
Refactored parts of the hardware loop pass to generate
more. Also, added more tests.

Differential Revision: http://reviews.llvm.org/D9568

llvm-svn: 236896
2015-05-08 20:18:21 +00:00

28 lines
715 B
LLVM

; RUN: llc -march=hexagon < %s | FileCheck %s
;
; Remove the unconditional jump to following instruction.
; CHECK: endloop0
; CHECK-NOT: jump [[L1:.]]
; CHECK-NOT: [[L1]]
define void @test(i32* nocapture %a, i32 %n) nounwind {
entry:
br label %for.body
for.body:
%arrayidx.phi = phi i32* [ %a, %entry ], [ %arrayidx.inc, %for.body ]
%i.02 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
%0 = load i32, i32* %arrayidx.phi, align 4
%add = add nsw i32 %0, 1
store i32 %add, i32* %arrayidx.phi, align 4
%inc = add nsw i32 %i.02, 1
%exitcond = icmp eq i32 %inc, 100
%arrayidx.inc = getelementptr i32, i32* %arrayidx.phi, i32 1
br i1 %exitcond, label %for.end, label %for.body
for.end:
ret void
}